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Searched refs:r12 (Results 1 – 25 of 39) sorted by relevance

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/titanic_44/usr/src/lib/brand/shared/brand/amd64/
H A Dhandler.s82 movq %r12, EH_LOCALS_GREG(REG_R12)(%rbp)
106 popq %r12
107 movq %r12, EH_LOCALS_GREG(REG_RFL)(%rbp)
108 movq EH_ARGS_OFFSET(0)(%rbp), %r12 /* save syscall rbp */
109 movq %r12, EH_LOCALS_GREG(REG_RBP)(%rbp)
110 movq %rbp, %r12 /* save syscall rsp */
111 addq $CPTRSIZE, %r12
112 movq %r12, EH_LOCALS_GREG(REG_RSP)(%rbp)
113 movq %fs:0, %r12 /* save syscall fsbase */
114 movq %r12, EH_LOCALS_GREG(REG_FSBASE)(%rbp)
[all …]
/titanic_44/usr/src/cmd/mdb/intel/amd64/kmdb/
H A Dkaif_invoke.s70 pushq %r12 /* our extra stack space */
71 clrq %r12
87 movq %rsi, %r12
88 subq $6, %r12
89 shlq $3, %r12
90 subq %r12, %rsp
129 addq %r12, %rsp
130 popq %r12
/titanic_44/usr/src/uts/i86pc/ml/
H A Dinterrupt.s80 TRACE_PTR(%r12, %rax, %eax, %rdx, $TT_INTERRUPT)
82 TRACE_REGS(%r12, %rsp, %rax, %rbx) /* Uses label 9 */
83 TRACE_STAMP(%r12) /* Clobbers %eax, %edx, uses 9 */
87 TRACE_STACK(%r12)
92 movl $255, TTR_IPL(%r12)
94 movb %dil, TTR_PRI(%r12)
96 movb %dil, TTR_SPL(%r12)
97 movb $255, TTR_VECTOR(%r12)
98 movq %r12, %rsi /* pass traptrace record pointer */
H A Dsyscall_asm_amd64.s464 movq %r12, REGOFF_R12(%rsp)
540 movq %rax, %r12
549 movq %r12, %r13
598 movq %r12, REGOFF_RAX(%rsp)
619 movq REGOFF_R12(%rsp), %r12
692 movq %rax, %r12
704 movq %r12, %rdi
904 movq %r12, %rsi /* rval1 - %eax */
H A Dbios_call_src.s91 movq %r12, save_r12
189 xorq %r12, %r12
472 movq save_r12, %r12
H A Dfb_swtch_src.s149 xorq %r12, %r12
/titanic_44/usr/src/uts/intel/ia32/ml/
H A Dswtch.s95 movq %r12, T_R12(thread_t); \
103 movq %rdi, %r12; \
120 movq T_R12(scratch_reg), %r12; \
293 GET_THREAD_HATP(%rdi, %r12, %r11)
316 btsl $0, T_LOCK(%r12) /* attempt to lock new thread's mutex */
321 cmpb $0, T_LOCK(%r12) /* check mutex status */
331 cmpq %r13, T_CPU(%r12)
336 movq %r13, T_CPU(%r12) /* set new thread's CPU pointer */
349 movq T_STACK(%r12), %rax
359 movq %r12, CPU_THREAD(%r13) /* set CPU's thread pointer */
[all …]
H A Dlock_prim.s105 movq %rdi, %r12 /* preserve lock ptr for debugging */
1120 movq $srcaddr, %r12; \
1121 addq %rbx, %r12; \
1124 decq %r12; \
1125 movzbl (%r12), %esi; \
1145 pushq %r12
1169 popq %r12
/titanic_44/usr/src/cmd/sgs/test/ld/x64/tls/ie/
H A DMakefile50 PROGS += style2-with-r12
51 STYLE2R12OBJS = style2-with-r12.o
52 style2-with-r12: $(STYLE2R12OBJS)
74 PROGS += style1-with-r12
75 STYLE1R12OBJS = style1-main.o style1-func-with-r12.o
76 style1-with-r12: $(STYLE1R12OBJS)
H A Dstyle1-func-with-r12.s28 movq %fs:0, %r12
29 movq %r12, %rdx
31 addq foo@GOTTPOFF(%rip), %r12
32 movq %r12, %rsi
H A Dstyle2-with-r12.s28 movq foo@GOTTPOFF(%rip), %r12
29 addq %fs:0, %r12
30 movq %r12, %rsi
H A Dx64-ie-test.sh47 dis_test "addq-->addq for SIB 1" func style1-with-r12 \
49 dis_test "addq-->addq for SIB 2" func style1-with-r12 \
58 dis_test "movq-->movq incase of SIB" main style2-with-r12 \
/titanic_44/usr/src/uts/intel/ia32/sys/
H A Dtraptrace.h228 pushq %r12; \
229 movq tt, %r12; \
230 leaq TTR_STACK(%r12), %rdi; \
233 movl %eax, TTR_SDEPTH(%r12); \
234 popq %r12; \
/titanic_44/usr/src/common/crypto/arcfour/amd64/
H A Darcfour-x86_64.pl132 $YY="%r12";
158 push %r12
223 pop %r12
/titanic_44/usr/src/lib/libc/amd64/unwind/
H A Dunwind_frame.s52 movq %r12,96(%rdi)
75 movq 96(%rax),%r12
/titanic_44/usr/src/cmd/mdb/intel/amd64/libstand/
H A Dsetjmp.s73 movq %r12, 8(%rdi)
105 movq 8(%rdi), %r12
/titanic_44/usr/src/lib/libc/amd64/gen/
H A Dsetjmp.s58 movq %r12, 8(%rdi)
80 movq 8(%rdi), %r12
/titanic_44/usr/src/lib/common/amd64/
H A Dgcrt1.s127 movq %rdx,%r12 /* save rt_do_exit for later atexit */
138 movq %r12,%rdi /* register rt_do_exit */
/titanic_44/usr/src/common/crypto/sha2/amd64/
H A Dsha512-x86_64.pl89 ($T1,$a0,$a1,$a2)=("%r12","%r13","%r14","%r15");
229 push %r12
316 pop %r12
/titanic_44/usr/src/uts/common/xen/public/arch-x86/
H A Dxen-x86_64.h160 uint64_t r12; member
222 unsigned long r12; member
/titanic_44/usr/src/common/crypto/md5/amd64/
H A Dmd5_amd64.pl175 push %r12
297 pop %r12
/titanic_44/usr/src/common/crypto/sha1/amd64/
H A Dsha1-x86_64.pl90 push %r12
111 pop %r12
/titanic_44/usr/src/uts/intel/amd64/sys/
H A Dprivregs.h155 movq %r12, REGOFF_R12(%rsp); \
193 movq REGOFF_R12(%rsp), %r12; \
/titanic_44/usr/src/lib/libsaveargs/tests/testmatch/
H A Ddata.s348 movq %r12,-0x28(%rbp)
355 movq %rdi,%r12
364 movq %r12,-0x20(%rbp)
/titanic_44/usr/src/common/crypto/aes/amd64/
H A Daes_amd64.s713 mov %r12, 3*8(%rsp) / P3: context in r8
726 mov %r12, 3*8(%rsp)
784 mov 3*8(%rsp), %r12
817 mov %r12, 3*8(%rsp) / P3: context in r8
830 mov %r12, 3*8(%rsp)
894 mov 3*8(%rsp), %r12

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