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Searched refs:ql_wait_reg_bit (Results 1 – 4 of 4) sorted by relevance

/titanic_44/usr/src/uts/common/io/fibre-channel/fca/qlge/
H A Dqlge_mpi.c39 if (ql_wait_reg_bit(qlge, REG_STATUS, STS_PI, BIT_SET, timeout) in ql_poll_processor_intr()
55 if (ql_wait_reg_bit(qlge, REG_PROCESSOR_ADDR, in ql_wait_processor_addr_reg_ready()
182 if (ql_wait_reg_bit(qlge, REG_HOST_CMD_STATUS, in ql_issue_mailbox_cmd()
1174 if (ql_wait_reg_bit(qlge, REG_HOST_CMD_STATUS, RISC_RESET, in ql_reset_mpi_risc()
H A Dqlge_dbg.c147 ql_wait_reg_bit(qlge_t *qlge, uint32_t reg, uint32_t wait_bit, int set, in ql_wait_reg_bit() function
1829 if (ql_wait_reg_bit(qlge, REG_XG_SERDES_ADDR, in ql_read_serdes_reg()
1835 if (ql_wait_reg_bit(qlge, REG_XG_SERDES_ADDR, in ql_read_serdes_reg()
H A Dqlge.c370 return (ql_wait_reg_bit(qlge, REG_CONFIGURATION, bit, BIT_RESET, 0)); in ql_wait_cfg()
4580 if (ql_wait_reg_bit(qlge, REG_MAC_PROTOCOL_ADDRESS_INDEX, in ql_write_mac_proto_regs()
4795 if (ql_wait_reg_bit(qlge, REG_XGMAC_ADDRESS, XGMAC_ADDRESS_RDY, in ql_read_xgmac_reg()
4806 if (ql_wait_reg_bit(qlge, REG_XGMAC_ADDRESS, XGMAC_ADDRESS_RDY, in ql_read_xgmac_reg()
7098 if (ql_wait_reg_bit(qlge, REG_RESET_FAILOVER, FUNCTION_RESET, in ql_asic_reset()
/titanic_44/usr/src/uts/common/sys/fibre-channel/fca/qlge/
H A Dqlge.h840 extern int ql_wait_reg_bit(qlge_t *, uint32_t, uint32_t, int, uint32_t);