Searched refs:platform_isa_handle (Results 1 – 3 of 3) sorted by relevance
| /titanic_44/usr/src/uts/sun4u/fjlite/os/ |
| H A D | fjlite.c | 61 static ddi_acc_handle_t platform_isa_handle; /* handle for isa pci space */ variable
101 if (pci_config_setup(dip, &platform_isa_handle) != DDI_SUCCESS) { in load_platform_drivers()
119 val = pci_config_get8(platform_isa_handle, 0x58); in plat_ide_chipreset()
134 pci_config_put8(platform_isa_handle, 0x58, val & 0xFB); in plat_ide_chipreset()
136 pci_config_put8(platform_isa_handle, 0x58, val); in plat_ide_chipreset()
143 pci_config_put8(platform_isa_handle, 0x58, val & 0xF7); in plat_ide_chipreset()
145 pci_config_put8(platform_isa_handle, 0x58, val); in plat_ide_chipreset()
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| /titanic_44/usr/src/uts/sun4u/snowbird/os/ |
| H A D | snowbird.c | 68 ddi_acc_handle_t platform_isa_handle; /* handle for isa pci space */ variable
101 if (pci_config_setup(dip, &platform_isa_handle) != DDI_SUCCESS) { in load_platform_drivers()
145 val = pci_config_get8(platform_isa_handle, 0x58); in plat_ide_chipreset()
160 pci_config_put8(platform_isa_handle, 0x58, val & 0xFB); in plat_ide_chipreset()
162 pci_config_put8(platform_isa_handle, 0x58, val); in plat_ide_chipreset()
169 pci_config_put8(platform_isa_handle, 0x58, val & 0xF7); in plat_ide_chipreset()
171 pci_config_put8(platform_isa_handle, 0x58, val); in plat_ide_chipreset()
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| /titanic_44/usr/src/uts/sun4u/blade/os/ |
| H A D | blade.c | 89 static ddi_acc_handle_t platform_isa_handle; /* handle for isa pci space */ variable
134 if (pci_config_setup(dip, &platform_isa_handle) != DDI_SUCCESS) { in load_platform_drivers()
178 if (platform_isa_handle == NULL) in plat_ide_chipreset()
181 val = pci_config_get8(platform_isa_handle, 0x58); in plat_ide_chipreset()
196 pci_config_put8(platform_isa_handle, 0x58, val & 0xFB); in plat_ide_chipreset()
198 pci_config_put8(platform_isa_handle, 0x58, val); in plat_ide_chipreset()
205 pci_config_put8(platform_isa_handle, 0x58, val & 0xF7); in plat_ide_chipreset()
207 pci_config_put8(platform_isa_handle, 0x58, val); in plat_ide_chipreset()
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