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Searched refs:pecc_ue (Results 1 – 3 of 3) sorted by relevance

/titanic_44/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_ecc.c67 pecc_p->pecc_ue.pecc_p = pecc_p; in pcmu_ecc_create()
68 pecc_p->pecc_ue.pecc_type = CBNINTR_UE; in pcmu_ecc_create()
77 pecc_p->pecc_ue.pecc_afsr_pa = pcb_base_pa + PCMU_UE_AFSR_OFFSET; in pcmu_ecc_create()
78 pecc_p->pecc_ue.pecc_afar_pa = pcb_base_pa + PCMU_UE_AFAR_OFFSET; in pcmu_ecc_create()
84 pecc_p->pecc_ue.pecc_afsr_pa, pecc_p->pecc_ue.pecc_afar_pa); in pcmu_ecc_create()
104 ret = pcmu_ecc_add_intr(pcmu_p, CBNINTR_UE, &pecc_p->pecc_ue); in pcmu_ecc_register_intr()
123 pcmu_ecc_rem_intr(pcmu_p, CBNINTR_UE, &pecc_p->pecc_ue); in pcmu_ecc_destroy()
153 stdphysio(pecc_p->pecc_ue.pecc_afsr_pa, l); in pcmu_ecc_configure()
H A Dpcicmu.c1545 pecc_p->pecc_ue.pecc_errpndg_mask = 0; in pcmu_ecc_setup()
1546 pecc_p->pecc_ue.pecc_offset_mask = PCMU_ECC_UE_AFSR_DW_OFFSET; in pcmu_ecc_setup()
1547 pecc_p->pecc_ue.pecc_offset_shift = PCMU_ECC_UE_AFSR_DW_OFFSET_SHIFT; in pcmu_ecc_setup()
1548 pecc_p->pecc_ue.pecc_size_log2 = 3; in pcmu_ecc_setup()
/titanic_44/usr/src/uts/sun4u/opl/sys/pcicmu/
H A Dpcmu_ecc.h53 struct pcmu_ecc_intr_info pecc_ue; /* ECC UE error intr info */ member