Home
last modified time | relevance | path

Searched refs:pci_reg (Results 1 – 9 of 9) sorted by relevance

/titanic_44/usr/src/uts/sun4u/montecarlo/io/
H A Dacebus.c379 pci_regspec_t pci_reg; in acebus_map() local
442 rval = acebus_apply_range(ebus_p, rdip, ebus_rp, &pci_reg); in acebus_map()
465 pci_reg.pci_phys_hi |= PCI_RELOCAT_B; in acebus_map()
469 pci_reg.pci_phys_hi, in acebus_map()
470 pci_reg.pci_phys_mid, in acebus_map()
471 pci_reg.pci_phys_low, in acebus_map()
472 pci_reg.pci_size_hi, in acebus_map()
473 pci_reg.pci_size_low); in acebus_map()
478 p_map_request.map_obj.rp = (struct regspec *)&pci_reg; in acebus_map()
/titanic_44/usr/src/uts/i86pc/io/pci/
H A Dpci.c340 pci_regspec_t pci_reg; in pci_bus_map() local
366 pci_reg = *(pci_regspec_t *)(mp->map_obj.rp); in pci_bus_map()
367 pci_rp = &pci_reg; in pci_bus_map()
399 pci_reg = pci_rp[rnumber]; in pci_bus_map()
406 pci_rp = &pci_reg; in pci_bus_map()
/titanic_44/usr/src/uts/i86pc/io/pciex/
H A Dnpe.c422 pci_regspec_t pci_reg; in npe_bus_map() local
439 pci_reg = *(pci_regspec_t *)(mp->map_obj.rp); in npe_bus_map()
440 pci_rp = &pci_reg; in npe_bus_map()
472 pci_reg = pci_rp[rnumber]; in npe_bus_map()
479 pci_rp = &pci_reg; in npe_bus_map()
/titanic_44/usr/src/uts/sun4u/io/
H A Dpmubus.c665 pci_regspec_t pci_reg; in pmubus_map() local
755 ret = pmubus_apply_range(pmubusp, rdip, &pmubus_rp, &pci_reg); in pmubus_map()
836 mp->map_obj.rp = (struct regspec *)&pci_reg; in pmubus_map()
H A Dsbbc.c517 pci_regspec_t pci_reg; in sbbc_busmap() local
588 rval = sbbc_apply_range(sbbcsoftp, rdip, child_rp, &pci_reg); in sbbc_busmap()
598 p_map_request.map_obj.rp = (struct regspec *)&pci_reg; in sbbc_busmap()
/titanic_44/usr/src/uts/common/io/fibre-channel/fca/qlge/
H A Dqlge_dbg.c961 struct ql_pci_reg *pci_reg; in ql_chip_ioctl() local
996 pci_reg = (struct ql_pci_reg *)(void *)dmp->b_rptr; in ql_chip_ioctl()
1024 if (iocp->ioc_count != sizeof (*pci_reg)) { in ql_chip_ioctl()
1028 if (pci_reg->addr > 0xff) in ql_chip_ioctl()
1030 pci_reg->value = in ql_chip_ioctl()
1032 pci_reg->addr); in ql_chip_ioctl()
1036 if (iocp->ioc_count != sizeof (*pci_reg)) { in ql_chip_ioctl()
1040 if (pci_reg->addr > 0xff) in ql_chip_ioctl()
1042 pci_config_put16(qlge->pci_handle, pci_reg->addr, in ql_chip_ioctl()
1043 pci_reg->value); in ql_chip_ioctl()
/titanic_44/usr/src/uts/common/io/bnxe/577xx/drivers/common/include/
H A Dmm.h216 u32_t pci_reg,
221 u32_t pci_reg,
/titanic_44/usr/src/uts/sun4u/io/pci/
H A Ddb21554.c1723 pci_regspec_t *pci_regsetp, pci_reg; in db_pci_map() local
1753 pci_reg = pci_regsetp[rnumber]; in db_pci_map()
1758 pci_reg = *(pci_regspec_t *)mp->map_obj.rp; in db_pci_map()
1764 addr_space_type = pci_reg.pci_phys_hi & PCI_ADDR_MASK; in db_pci_map()
1856 PCI_REG_BUS_G(pci_reg.pci_phys_hi); in db_pci_map()
1858 PCI_REG_DEV_G(pci_reg.pci_phys_hi); in db_pci_map()
1860 PCI_REG_FUNC_G(pci_reg.pci_phys_hi); in db_pci_map()
/titanic_44/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_devinfo.c383 u32_t pci_reg, val; in lm_get_bar_offset_direct() local
388 pci_reg = PCICFG_BAR_1_LOW; in lm_get_bar_offset_direct()
391 pci_reg = PCICFG_BAR_1_LOW + 8; in lm_get_bar_offset_direct()
394 pci_reg = PCICFG_BAR_1_LOW + 16; in lm_get_bar_offset_direct()
401 lm_status = mm_read_pci(pdev, pci_reg, &val); in lm_get_bar_offset_direct()
408 pci_reg += 4; /* sizeof configuration space bar address register */ in lm_get_bar_offset_direct()
409 lm_status = mm_read_pci(pdev, pci_reg, &val); in lm_get_bar_offset_direct()