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Searched refs:pci_config_get16 (Results 1 – 25 of 133) sorted by relevance

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/titanic_44/usr/src/uts/common/io/igb/
H A Digb_debug.c63 pci_config_get16(handle, PCI_CONF_VENID)); in pci_dump()
66 pci_config_get16(handle, PCI_CONF_DEVID)); in pci_dump()
69 pci_config_get16(handle, PCI_CONF_COMM)); in pci_dump()
72 pci_config_get16(handle, PCI_CONF_STAT)); in pci_dump()
123 pci_config_get16(handle, PCI_CONF_SUBVENID)); in pci_dump()
126 pci_config_get16(handle, PCI_CONF_SUBSYSID)); in pci_dump()
161 pci_config_get16(handle, offset + PCI_PMCAP)); in pci_dump()
164 pci_config_get16(handle, offset + PCI_PMCSR)); in pci_dump()
185 pci_config_get16(handle, offset + PCI_MSI_CTRL)); in pci_dump()
194 pci_config_get16(handle, offset + 0xC)); in pci_dump()
[all …]
H A Digb_osdep.c58 pci_config_get16(OS_DEP(hw)->cfg_handle, reg); in e1000_read_pci_cfg()
78 *value = pci_config_get16(OS_DEP(hw)->cfg_handle, in e1000_read_pcie_cap_reg()
/titanic_44/usr/src/uts/common/io/ixgbe/
H A Dixgbe_debug.c188 pci_config_get16(handle, PCI_CONF_VENID)); in ixgbe_pci_dump()
191 pci_config_get16(handle, PCI_CONF_DEVID)); in ixgbe_pci_dump()
194 pci_config_get16(handle, PCI_CONF_COMM)); in ixgbe_pci_dump()
197 pci_config_get16(handle, PCI_CONF_STAT)); in ixgbe_pci_dump()
248 pci_config_get16(handle, PCI_CONF_SUBVENID)); in ixgbe_pci_dump()
251 pci_config_get16(handle, PCI_CONF_SUBSYSID)); in ixgbe_pci_dump()
286 pci_config_get16(handle, offset + PCI_PMCAP)); in ixgbe_pci_dump()
289 pci_config_get16(handle, offset + PCI_PMCSR)); in ixgbe_pci_dump()
310 pci_config_get16(handle, offset + PCI_MSI_CTRL)); in ixgbe_pci_dump()
319 pci_config_get16(handle, offset + 0xC)); in ixgbe_pci_dump()
[all …]
H A Dixgbe_osdep.c35 return (pci_config_get16(OS_DEP(hw)->cfg_handle, reg)); in ixgbe_read_pci_cfg()
/titanic_44/usr/src/uts/common/io/e1000g/
H A De1000g_debug.c383 pci_config_get16(handle, PCI_CONF_VENID)); in pciconfig_dump()
386 pci_config_get16(handle, PCI_CONF_DEVID)); in pciconfig_dump()
389 pci_config_get16(handle, PCI_CONF_COMM)); in pciconfig_dump()
392 pci_config_get16(handle, PCI_CONF_STAT)); in pciconfig_dump()
430 pci_config_get16(handle, PCI_CONF_SUBVENID)); in pciconfig_dump()
433 pci_config_get16(handle, PCI_CONF_SUBSYSID)); in pciconfig_dump()
468 pci_config_get16(handle, offset + PCI_PMCAP)); in pciconfig_dump()
471 pci_config_get16(handle, offset + PCI_PMCSR)); in pciconfig_dump()
492 pci_config_get16(handle, offset + PCI_MSI_CTRL)); in pciconfig_dump()
501 pci_config_get16(handle, offset + 0xC)); in pciconfig_dump()
[all …]
H A De1000g_osdep.c55 pci_config_get16(OS_DEP(hw)->cfg_handle, reg); in e1000_read_pci_cfg()
111 *value = pci_config_get16(OS_DEP(hw)->cfg_handle, in e1000_read_pcie_cap_reg()
/titanic_44/usr/src/uts/i86pc/io/pciex/
H A Dnpe_misc.c120 if ((pci_config_get16(cfg_hdl, PCI_CONF_VENID) == NVIDIA_VENDOR_ID) && in npe_ck804_fix_aer_ptr()
121 (pci_config_get16(cfg_hdl, PCI_CONF_DEVID) == in npe_ck804_fix_aer_ptr()
125 cya1 = pci_config_get16(cfg_hdl, NVIDIA_CK804_VEND_CYA1_OFF); in npe_ck804_fix_aer_ptr()
155 uint16_t vendor_id = pci_config_get16(cfg_hdl, PCI_CONF_VENID); in npe_nvidia_error_workaround()
156 uint16_t dev_id = pci_config_get16(cfg_hdl, PCI_CONF_DEVID); in npe_nvidia_error_workaround()
175 uint16_t vendor_id = pci_config_get16(cfg_hdl, PCI_CONF_VENID); in npe_intel_error_workaround()
176 uint16_t dev_id = pci_config_get16(cfg_hdl, PCI_CONF_DEVID); in npe_intel_error_workaround()
285 reg = pci_config_get16(cfg_hdl, ptr + PCI_CAP_ID_REGS_OFF); in npe_enable_htmsi()
/titanic_44/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c1540 uint16_t word16 = pci_config_get16(handle, PCI_CONF_COMM); in cardbus_update_bridge()
2392 pci_config_get16(config_handle, PCI_CONF_VENID)); in cardbus_probe_bridge()
2395 pci_config_get16(config_handle, PCI_CONF_DEVID)); in cardbus_probe_bridge()
2591 pci_config_get16(config_handle, PCI_CONF_VENID)); in cardbus_probe_children()
2594 pci_config_get16(config_handle, PCI_CONF_DEVID)); in cardbus_probe_children()
2767 pci_config_get16(config_handle, 0x40), in cardbus_probe_children()
2768 pci_config_get16(config_handle, 0x42)); in cardbus_probe_children()
2772 pci_config_get16(config_handle, 0x44), in cardbus_probe_children()
2773 pci_config_get16(config_handle, 0x46)); in cardbus_probe_children()
2777 pci_config_get16(config_handle, 0x4a), in cardbus_probe_children()
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H A Dcardbus_hp.c1690 { "VendorId =", 0, (int(*)())pci_config_get16, "%s 0x%04x" },
1691 { "DeviceId =", 2, (int(*)())pci_config_get16, "%s 0x%04x" },
1692 { "Command =", 4, (int(*)())pci_config_get16, "%s 0x%04x" },
1693 { "Status =", 6, (int(*)())pci_config_get16, "%s 0x%04x" },
1707 { "VendorId =", 0, (int(*)())pci_config_get16, "%s 0x%04x" },
1708 { "DeviceId =", 2, (int(*)())pci_config_get16, "%s 0x%04x" },
1709 { "Command =", 4, (int(*)())pci_config_get16, "%s 0x%04x" },
1710 { "Status =", 6, (int(*)())pci_config_get16, "%s 0x%04x" },
1728 { "Bridge Ctrl =", 0x3e, (int(*)())pci_config_get16, "%s 0x%04x" },
/titanic_44/usr/src/uts/common/io/
H A Dpci_cap.c61 status = pci_config_get16(h, PCI_CONF_STAT); in pci_cap_probe()
77 if ((pcix_cmd = pci_config_get16(h, base + in pci_cap_probe()
130 status = pci_config_get16(h, PCI_CONF_STAT); in pci_lcap_locate()
173 status = pci_config_get16(h, PCI_CONF_STAT); in pci_xcap_locate()
212 status = pci_config_get16(h, PCI_CONF_STAT); in pci_htcap_locate()
234 (pci_config_get16(h, base + PCI_CAP_ID_REGS_OFF) & in pci_htcap_locate()
273 data = pci_config_get16(h, offset); in pci_cap_get()
H A Dpci_intr_lib.c1029 savereg = pci_config_get16(cfg_hdl, PCI_CONF_COMM); in pci_intx_get_cap()
1038 statreg = pci_config_get16(cfg_hdl, PCI_CONF_STAT); in pci_intx_get_cap()
1044 cmdreg = pci_config_get16(cfg_hdl, PCI_CONF_COMM); in pci_intx_get_cap()
1085 cmdreg = pci_config_get16(cfg_hdl, PCI_CONF_COMM); in pci_intx_clr_mask()
1117 cmdreg = pci_config_get16(cfg_hdl, PCI_CONF_COMM); in pci_intx_set_mask()
1151 statreg = pci_config_get16(cfg_hdl, PCI_CONF_STAT); in pci_intx_get_pending()
/titanic_44/usr/src/uts/i86xpv/io/psm/
H A Dxpv_intr.c266 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in apic_pci_msi_enable_vector()
288 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in apic_pci_msi_disable_mode()
296 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSIX_CTRL); in apic_pci_msi_disable_mode()
319 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in apic_pci_msi_enable_mode()
343 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSIX_CTRL); in apic_pci_msi_enable_mode()
/titanic_44/usr/src/uts/common/os/
H A Dsunpci.c72 pci_config_get16(ddi_acc_handle_t handle, off_t offset) in pci_config_get16() function
418 status = pci_config_get16(confhdl, PCI_CONF_STAT);
502 chsp->chs_command = pci_config_get16(confhdl, PCI_CONF_COMM);
508 pci_config_get16(confhdl, PCI_BCNF_BCNTRL);
593 status = pci_config_get16(confhdl, PCI_CONF_STAT);
609 cap_reg = pci_config_get16(confhdl,
677 msi_ctrl = pci_config_get16(confhdl, cap_ptr + PCI_MSI_CTRL);
698 pcix_command = pci_config_get16(confhdl, cap_ptr + PCI_PCIX_COMMAND);
724 reg = pci_config_get16(confhdl, cap_ptr + PCI_CAP_ID_REGS_OFF);
752 reg = pci_config_get16(confhdl, cap_ptr + PCI_CAP_ID_REGS_OFF);
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H A Dpcifm.c142 pcix_bdg_regs->pcix_bdg_sec_stat = pci_config_get16( in pcix_regs_gather()
175 pcix_regs->pcix_command = pci_config_get16(erpt_p->pe_hdl, in pcix_regs_gather()
203 pci_regs->pci_err_status = pci_config_get16(erpt_p->pe_hdl, in pci_regs_gather()
208 pci_regs->pci_cfg_comm = pci_config_get16(erpt_p->pe_hdl, in pci_regs_gather()
218 pci_config_get16(erpt_p->pe_hdl, PCI_BCNF_SEC_STATUS); in pci_regs_gather()
223 pci_config_get16(erpt_p->pe_hdl, PCI_BCNF_BCNTRL); in pci_regs_gather()
368 pcix_bdg_regs->pcix_bdg_ver = pci_config_get16(erpt_p->pe_hdl, in pcix_ereport_setup()
384 pcix_regs->pcix_ver = pci_config_get16(erpt_p->pe_hdl, in pcix_ereport_setup()
431 pci_status = pci_config_get16(erpt_p->pe_hdl, PCI_CONF_STAT); in pci_ereport_setup()
/titanic_44/usr/src/uts/i86pc/io/fipe/
H A Dfipe_drv.c205 venid = pci_config_get16(handle, PCI_CONF_VENID); in fipe_validate_dip()
206 devid = pci_config_get16(handle, PCI_CONF_DEVID); in fipe_validate_dip()
207 subvenid = pci_config_get16(handle, PCI_CONF_SUBVENID); in fipe_validate_dip()
208 subsysid = pci_config_get16(handle, PCI_CONF_SUBSYSID); in fipe_validate_dip()
/titanic_44/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c397 pci_config_get16(config_handle, PCI_CONF_VENID)); in pcicfg_dump_common_config()
399 pci_config_get16(config_handle, PCI_CONF_DEVID)); in pcicfg_dump_common_config()
401 pci_config_get16(config_handle, PCI_CONF_COMM)); in pcicfg_dump_common_config()
403 pci_config_get16(config_handle, PCI_CONF_STAT)); in pcicfg_dump_common_config()
443 pci_config_get16(config_handle, PCI_CONF_SUBVENID)); in pcicfg_dump_device_config()
445 pci_config_get16(config_handle, PCI_CONF_SUBSYSID)); in pcicfg_dump_device_config()
480 pci_config_get16(config_handle, PCI_BCNF_SEC_STATUS)); in pcicfg_dump_bridge_config()
482 pci_config_get16(config_handle, PCI_BCNF_MEM_BASE)); in pcicfg_dump_bridge_config()
484 pci_config_get16(config_handle, PCI_BCNF_MEM_LIMIT)); in pcicfg_dump_bridge_config()
486 pci_config_get16(config_handle, PCI_BCNF_PF_BASE_LOW)); in pcicfg_dump_bridge_config()
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/titanic_44/usr/src/uts/sun4/io/
H A Dpcicfg.c426 pci_config_get16(config_handle, PCI_CONF_VENID)); in pcicfg_dump_common_config()
428 pci_config_get16(config_handle, PCI_CONF_DEVID)); in pcicfg_dump_common_config()
430 pci_config_get16(config_handle, PCI_CONF_COMM)); in pcicfg_dump_common_config()
432 pci_config_get16(config_handle, PCI_CONF_STAT)); in pcicfg_dump_common_config()
472 pci_config_get16(config_handle, PCI_CONF_SUBVENID)); in pcicfg_dump_device_config()
474 pci_config_get16(config_handle, PCI_CONF_SUBSYSID)); in pcicfg_dump_device_config()
510 pci_config_get16(config_handle, PCI_BCNF_SEC_STATUS)); in pcicfg_dump_bridge_config()
512 pci_config_get16(config_handle, PCI_BCNF_MEM_BASE)); in pcicfg_dump_bridge_config()
514 pci_config_get16(config_handle, PCI_BCNF_MEM_LIMIT)); in pcicfg_dump_bridge_config()
516 pci_config_get16(config_handle, PCI_BCNF_PF_BASE_LOW)); in pcicfg_dump_bridge_config()
[all …]
/titanic_44/usr/src/uts/sun4u/io/pci/
H A Dsimba.c788 command = pci_config_get16(config_handle, PCI_CONF_COMM); in simba_initchild()
802 pci_config_get16(config_handle, PCI_BCNF_BCNTRL); in simba_initchild()
935 statep->command = pci_config_get16(ch, PCI_CONF_COMM); in simba_save_config_regs()
939 pci_config_get16(ch, PCI_BCNF_BCNTRL); in simba_save_config_regs()
950 if (pci_config_get16(ch, PCI_CONF_VENID) == PCI_SIMBA_VENID && in simba_save_config_regs()
951 pci_config_get16(ch, PCI_CONF_DEVID) == PCI_SIMBA_DEVID) { in simba_save_config_regs()
960 pci_config_get16(ch, PCI_BCNF_BCNTRL); in simba_save_config_regs()
1021 if (pci_config_get16(ch, PCI_CONF_VENID) == PCI_SIMBA_VENID && in simba_restore_config_regs()
1022 pci_config_get16(ch, PCI_CONF_DEVID) == PCI_SIMBA_DEVID) { in simba_restore_config_regs()
H A Ddb21554.c1075 regval = pci_config_get16(dbp->conf_handle, (off_t)DB_CONF_CONF_CSR); in db_enable_io()
1085 regval = pci_config_get16(dbp->conf_handle, in db_enable_io()
1146 regval = pci_config_get16(dbp->conf_handle, in db_enable_io()
1154 regval = pci_config_get16(dbp->conf_handle, in db_enable_io()
1616 ph->venid = pci_config_get16(config_handle, hdr_off + PCI_CONF_VENID); in db_pci_get_header()
1617 ph->devid = pci_config_get16(config_handle, hdr_off + PCI_CONF_DEVID); in db_pci_get_header()
1618 ph->command = pci_config_get16(config_handle, hdr_off + PCI_CONF_COMM); in db_pci_get_header()
1619 ph->status = pci_config_get16(config_handle, hdr_off + PCI_CONF_STAT); in db_pci_get_header()
1641 ph->sub_venid = pci_config_get16(config_handle, in db_pci_get_header()
1643 ph->sub_devid = pci_config_get16(config_handle, in db_pci_get_header()
[all …]
/titanic_44/usr/src/uts/common/io/scsi/adapters/smrt/
H A Dsmrt_device.c104 smrt->smrt_pci_vendor = pci_config_get16(pci_hdl, PCI_CONF_VENID); in smrt_identify_device()
105 smrt->smrt_pci_device = pci_config_get16(pci_hdl, PCI_CONF_DEVID); in smrt_identify_device()
/titanic_44/usr/src/uts/common/io/fibre-channel/fca/oce/
H A Doce_hw.c222 dev->vendor_id = pci_config_get16(dev->pci_cfg_handle, in oce_identify_hw()
224 dev->device_id = pci_config_get16(dev->pci_cfg_handle, in oce_identify_hw()
226 dev->subsys_id = pci_config_get16(dev->pci_cfg_handle, in oce_identify_hw()
228 dev->subvendor_id = pci_config_get16(dev->pci_cfg_handle, in oce_identify_hw()
/titanic_44/usr/src/uts/intel/io/pciex/
H A Dpcieb_x86.c507 data = (uint32_t)pci_config_get16(cfg_hdl, in pcieb_intel_serr_workaround()
514 value = (uint32_t)pci_config_get16(cfg_hdl, in pcieb_intel_serr_workaround()
629 regw = pci_config_get16(cfg_hdl, PCI_CONF_COMM); in pcieb_intel_sw_workaround()
/titanic_44/usr/src/uts/common/io/audio/drv/audiots/
H A Daudiots.c589 if ((pci_config_get16(pcih, PCI_CONF_STAT) & PCI_STAT_CAP) == 0) { in audiots_power_up()
611 pmcsr = pci_config_get16(pcih, ptr); in audiots_power_up()
632 pmcsr = pci_config_get16(pcih, ptr); in audiots_power_up()
863 (pci_config_get16(state->ts_pcih, PCI_CONF_VENID) << 16) | in audiots_map_regs()
864 pci_config_get16(state->ts_pcih, PCI_CONF_DEVID); in audiots_map_regs()
/titanic_44/usr/src/uts/intel/io/agpgart/
H A Dagptarget.c133 value = (uint8_t)(pci_config_get16(pci_handle, PCI_CONF_STAT) in agp_target_cap_find()
225 value = pci_config_get16(softstate->tsoft_pcihdl, in agp_target_get_apsize()
509 softstate->tsoft_gms = pci_config_get16(softstate->tsoft_pcihdl, in intel_br_suspend()
755 value = pci_config_get16(st->tsoft_pcihdl, in agp_target_ioctl()
/titanic_44/usr/src/uts/i86pc/io/
H A Dconsplat.c304 data16 = pci_config_get16(pci_conf, PCI_BCNF_BCNTRL); in find_fb_dev()
347 data16 = pci_config_get16(pci_conf, PCI_CONF_COMM); in find_fb_dev()

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