| /titanic_44/usr/src/uts/i86xpv/io/psm/ |
| H A D | xpv_intr.c | 241 uint64_t msi_addr, msi_data; in apic_pci_msi_enable_vector() local
260 msi_data = ((MSI_DATA_TM_EDGE << MSI_DATA_TM_SHIFT) | vector); in apic_pci_msi_enable_vector()
263 "data=0x%lx\n", (long)msi_addr, (long)msi_data)); in apic_pci_msi_enable_vector()
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| H A D | xpv_psm.c | 1106 uint64_t msi_data = 0; in xpv_psm_get_msi_vector() local
1119 msi_data = pci_config_get16(handle, in xpv_psm_get_msi_vector()
1122 msi_data = pci_config_get16(handle, in xpv_psm_get_msi_vector()
1125 vector = (msi_data & 0xff) + entry; in xpv_psm_get_msi_vector()
1134 msi_data = ddi_get32(msix_p->msix_tbl_hdl, in xpv_psm_get_msi_vector()
1136 vector = msi_data & 0xff; in xpv_psm_get_msi_vector()
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| /titanic_44/usr/src/uts/i86pc/io/pcplusmp/ |
| H A D | apic_introp.c | 61 uint64_t msi_addr, msi_data; in apic_pci_msi_enable_vector() local
100 msi_data = msi_regs.mr_data; in apic_pci_msi_enable_vector()
103 "data=0x%lx\n", (long)msi_addr, (long)msi_data)); in apic_pci_msi_enable_vector()
122 cap_ptr + PCI_MSI_64BIT_DATA, msi_data); in apic_pci_msi_enable_vector()
125 cap_ptr + PCI_MSI_32BIT_DATA, msi_data); in apic_pci_msi_enable_vector()
139 (uint32_t *)(off + PCI_MSIX_DATA_OFFSET), msi_data); in apic_pci_msi_enable_vector()
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| /titanic_44/usr/src/uts/sun4/io/px/ |
| H A D | px_ioapi.h | 495 msi_data: 16; /* DW 6 - 15:00 */ member
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| H A D | px_intr.c | 331 msg_code = msiq_rec_p->msiq_rec_data.msi.msi_data; in px_msiq_intr()
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| /titanic_44/usr/src/uts/i86pc/io/ |
| H A D | immu_regs.c | 563 immu_regs_intr_enable(immu_t *immu, uint32_t msi_addr, uint32_t msi_data, in immu_regs_intr_enable() argument
569 immu->immu_regs_intr_msi_data = msi_data; in immu_regs_intr_enable()
572 put_reg32(immu, IMMU_REG_FEVNT_DATA, msi_data); in immu_regs_intr_enable()
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| H A D | immu_intrmap.c | 967 uint32_t msi_data; in immu_intr_register() local
991 msi_data = ((MSI_DATA_DELIVERY_FIXED << in immu_intr_register()
1001 immu_regs_intr_enable(immu, msi_addr, msi_data, uaddr); in immu_intr_register()
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| /titanic_44/usr/src/uts/i86pc/io/apix/ |
| H A D | apix_utils.c | 303 uint64_t msi_addr, msi_data; in apix_pci_msi_enable_vector() local
335 msi_data = msi_regs.mr_data; in apix_pci_msi_enable_vector()
338 "data=0x%lx\n", (long)msi_addr, (long)msi_data)); in apix_pci_msi_enable_vector()
357 APIX_WRITE_MSI_DATA(handle, cap_ptr, msi_ctrl, msi_data); in apix_pci_msi_enable_vector()
367 (uint32_t *)(off + PCI_MSIX_DATA_OFFSET), msi_data); in apix_pci_msi_enable_vector()
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| /titanic_44/usr/src/uts/common/io/xge/hal/include/ |
| H A D | xgehal-regs.h | 1226 u16 msi_data; // 0x4c member
1291 u16 msi_data; // 0x4c member
1349 u16 msi_data; // 0x4c
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| /titanic_44/usr/src/uts/i86pc/sys/ |
| H A D | immu.h | 886 void immu_regs_intr(immu_t *immu, uint32_t msi_addr, uint32_t msi_data,
908 void immu_regs_intr_enable(immu_t *immu, uint32_t msi_addr, uint32_t msi_data,
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| /titanic_44/usr/src/uts/sun4u/io/px/ |
| H A D | px_lib4u.c | 1025 msiq_rec_p->msiq_rec_data.msi.msi_data = in px_lib_get_msiq_rec()
1031 msiq_rec_p->msiq_rec_data.msi.msi_data = in px_lib_get_msiq_rec()
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| /titanic_44/usr/src/uts/common/io/xge/hal/xgehal/ |
| H A D | xgehal-mgmtaux.c | 1221 __HAL_AUX_ENTRY("msi_data", pci_config.msi_data, "0x%04X"); in xge_hal_aux_pci_config_read()
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