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Searched refs:msi_addr (Results 1 – 7 of 7) sorted by relevance

/titanic_44/usr/src/uts/i86xpv/io/psm/
H A Dxpv_intr.c241 uint64_t msi_addr, msi_data; in apic_pci_msi_enable_vector() local
254 msi_addr = (MSI_ADDR_HDR | in apic_pci_msi_enable_vector()
256 msi_addr |= ((MSI_ADDR_RH_FIXED << MSI_ADDR_RH_SHIFT) | in apic_pci_msi_enable_vector()
263 "data=0x%lx\n", (long)msi_addr, (long)msi_data)); in apic_pci_msi_enable_vector()
/titanic_44/usr/src/uts/i86pc/io/pcplusmp/
H A Dapic_introp.c61 uint64_t msi_addr, msi_data; in apic_pci_msi_enable_vector() local
97 msi_addr = msi_regs.mr_addr; in apic_pci_msi_enable_vector()
103 "data=0x%lx\n", (long)msi_addr, (long)msi_data)); in apic_pci_msi_enable_vector()
116 cap_ptr + PCI_MSI_ADDR_OFFSET, msi_addr); in apic_pci_msi_enable_vector()
120 cap_ptr + PCI_MSI_ADDR_OFFSET + 4, msi_addr >> 32); in apic_pci_msi_enable_vector()
141 (uint32_t *)(off + PCI_MSIX_LOWER_ADDR_OFFSET), msi_addr); in apic_pci_msi_enable_vector()
144 msi_addr >> 32); in apic_pci_msi_enable_vector()
/titanic_44/usr/src/uts/i86pc/io/
H A Dimmu_regs.c563 immu_regs_intr_enable(immu_t *immu, uint32_t msi_addr, uint32_t msi_data, in immu_regs_intr_enable() argument
567 immu->immu_regs_intr_msi_addr = msi_addr; in immu_regs_intr_enable()
570 put_reg32(immu, IMMU_REG_FEVNT_ADDR, msi_addr); in immu_regs_intr_enable()
H A Dimmu_intrmap.c969 uint32_t msi_addr; in immu_intr_register() local
975 msi_addr = (MSI_ADDR_HDR | in immu_intr_register()
1001 immu_regs_intr_enable(immu, msi_addr, msi_data, uaddr); in immu_intr_register()
/titanic_44/usr/src/uts/i86pc/io/apix/
H A Dapix_utils.c303 uint64_t msi_addr, msi_data; in apix_pci_msi_enable_vector() local
332 msi_addr = msi_regs.mr_addr; in apix_pci_msi_enable_vector()
338 "data=0x%lx\n", (long)msi_addr, (long)msi_data)); in apix_pci_msi_enable_vector()
352 cap_ptr + PCI_MSI_ADDR_OFFSET, msi_addr); in apix_pci_msi_enable_vector()
355 cap_ptr + PCI_MSI_ADDR_OFFSET + 4, msi_addr >> 32); in apix_pci_msi_enable_vector()
369 (uint32_t *)(off + PCI_MSIX_LOWER_ADDR_OFFSET), msi_addr); in apix_pci_msi_enable_vector()
372 msi_addr >> 32); in apix_pci_msi_enable_vector()
/titanic_44/usr/src/uts/sun4/io/px/
H A Dpx_intr.c556 uint64_t msi_addr; in px_msix_ops() local
569 msi_addr = msi_state_p->msi_addr64; in px_msix_ops()
573 msi_addr = msi_state_p->msi_addr32; in px_msix_ops()
736 nintrs, hdlp->ih_inum, msi_addr, in px_msix_ops()
775 nintrs, hdlp->ih_inum, msi_addr, in px_msix_ops()
/titanic_44/usr/src/uts/i86pc/sys/
H A Dimmu.h886 void immu_regs_intr(immu_t *immu, uint32_t msi_addr, uint32_t msi_data,
908 void immu_regs_intr_enable(immu_t *immu, uint32_t msi_addr, uint32_t msi_data,