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Searched refs:ldx (Results 1 – 25 of 116) sorted by relevance

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/titanic_44/usr/src/cmd/mdb/sparc/v9/kmdb/
H A Dkmdb_setcontext.s54 ldx [%g7 + UC_GREG(REG_O0)], %o0
55 ldx [%g7 + UC_GREG(REG_O1)], %o1
56 ldx [%g7 + UC_GREG(REG_O2)], %o2
57 ldx [%g7 + UC_GREG(REG_O3)], %o3
58 ldx [%g7 + UC_GREG(REG_O4)], %o4
59 ldx [%g7 + UC_GREG(REG_O5)], %o5
60 ldx [%g7 + UC_GREG(REG_O6)], %o6
61 ldx [%g7 + UC_GREG(REG_O7)], %o7
63 ldx [%g7 + UC_GREG(REG_G1)], %g1
64 ldx [%g7 + UC_GREG(REG_G2)], %g2
[all …]
H A Dkaif_resume.s84 ldx [%g4 + FPU_FPRS], %g2
90 ldx [%g4 + FPU_FSR], %fsr
105 ldx [%g6 + KRS_RWINS], %g3 ! %g3 = &cpusave[this_cpuid].krs_wins
116 ldx [%g5 + KREG_OFF(KREG_CWP)], %g4
118 ldx [%g5 + KREG_OFF(KREG_OTHERWIN)], %g4
120 ldx [%g5 + KREG_OFF(KREG_CLEANWIN)], %g4
122 ldx [%g5 + KREG_OFF(KREG_CANSAVE)], %g4
124 ldx [%g5 + KREG_OFF(KREG_CANRESTORE)], %g4
126 ldx [%g5 + KREG_OFF(KREG_WSTATE)], %g4
129 ldx [%g5 + KREG_OFF(KREG_Y)], %g4
[all …]
H A Dkaif_invoke.s97 ldx [%l0 + %i1], %l0
122 ldx [%l0 + %i1], %l2
131 cp6arg: ldx [%i2 + 5*8], %o5
132 cp5arg: ldx [%i2 + 4*8], %o4
133 cp4arg: ldx [%i2 + 3*8], %o3
134 cp3arg: ldx [%i2 + 2*8], %o2
135 cp2arg: ldx [%i2 + 1*8], %o1
136 cp1arg: ldx [%i2 + 0*8], %o0
H A Dkaif_handlers.s84 ldx [ctx + MMFSA_D_ADDR], daddr; \
85 ldx [ctx + MMFSA_D_CTX], ctx
89 ldx [ctx + MMFSA_I_ADDR], iaddr; \
90 ldx [ctx + MMFSA_I_CTX], ctx
109 ldx [%o2 + MMFSA_I_ADDR], %o0; \
110 ldx [%o2 + MMFSA_I_CTX], %o1; \
142 ldx [%o2 + MMFSA_D_ADDR], %o0; \
143 ldx [%o2 + MMFSA_D_CTX], %o1; \
214 ldx [%g7 + .count-0b], %g2
271 ldx [%g7 + .count-0b], %g2
[all …]
H A Dkaif_startup.s47 ldx [%g1 + MDB_KDI], %g1; \
48 ldx [%g1 + MKDI_CPU_INDEX], %g1; \
62 ldx [src + KREG_OFF(idx)], tmp; \
186 ldx [%g5 + KREG_OFF(KREG_PC)], %g4
188 ldx [%g5 + KREG_OFF(KREG_TT)], %g4
253 ldx [%g6 + KRS_RWINS], %g3
430 1: ldx [%g0], %g0
659 ldx [%g1], %g1
735 ldx [%g4 + KREG_OFF(KREG_PC)], %g1
737 ldx [%g4 + KREG_OFF(KREG_TT)], %g1
[all …]
H A Dkaif_asmutil.h53 ldx [cpusave + KRS_CURCRUMB], tmp1; \
68 ldx [cpusave + KRS_CURCRUMB], tmp; \
72 ldx [cpusave + KRS_CURCRUMB], tmp1; \
77 ldx [cpusave + KRS_CURCRUMB], tmp1; \
H A Dkmdb_start.s60 ldx [%g1], %g1
63 ldx [%g2], %g2
/titanic_44/usr/src/common/crypto/des/sun4u/
H A Ddes_crypt_asm.s2289 ldx [%o1 + %g1], %i5
2303 ldx [%i5 + 0], %l7 ! &(des_ip_table[0][0])
2307 ldx [%i5 + 8], %l6 ! &(des_ip_table[1][0])
2315 ldx [%i5 + 24], %l0 ! &(des_sbox_table[0][0])
2319 ldx [%l7 + %o0], %o0
2323 ldx [%l6 + %o1], %o1
2327 ldx [%l7 + %o2], %o2
2331 ldx [%l6 + %o3], %o3
2335 ldx [%l7 + %o4], %o4
2339 ldx [%l6 + %o5], %o5
[all …]
/titanic_44/usr/src/uts/sparc/v9/sys/
H A Dprivregs.h100 ldx [RP + G1_OFF], %g1; \
101 ldx [RP + G2_OFF], %g2; \
102 ldx [RP + G3_OFF], %g3; \
103 ldx [RP + G4_OFF], %g4; \
104 ldx [RP + G5_OFF], %g5; \
105 ldx [RP + G6_OFF], %g6; \
106 ldx [RP + G7_OFF], %g7;
119 ldx [RP + O0_OFF], %i0; \
120 ldx [RP + O1_OFF], %i1; \
121 ldx [RP + O2_OFF], %i2; \
[all …]
/titanic_44/usr/src/uts/sun4v/sys/
H A Dmachclock.h58 ldx [scr1 + %lo(native_stick_offset)], scr2; \
60 ldx [scr1 + %lo(native_stick_offset)], scr1; \
85 ldx [scr1 + %lo(native_stick_offset)], scr1; \
106 ldx [scr1 + %lo(native_tick_offset)], scr2; \
108 ldx [scr1 + %lo(native_tick_offset)], scr1; \
118 ldx [scr1 + %lo(native_tick_offset)], scr1; \
158 ldx [scr1 + %lo(native_stick_offset)], scr1; \
162 ldx [scr1 + %lo(native_tick_offset)], scr1; \
170 ldx [scr1 + %lo(native_stick_offset)], scr2; \
172 ldx [scr1 + %lo(native_stick_offset)], scr1; \
[all …]
/titanic_44/usr/src/uts/sun4/ml/
H A Dip_ocsum.s300 ldx [%i0+0], %l0
301 ldx [%i0+8], %l1
302 ldx [%i0+16], %l2 ! %l0 could be used here if Dcache hit
303 ldx [%i0+24], %l3 ! but US-II prefetch only loads Ecache
304 ldx [%i0+32], %l4 ! check on US-III: could mix preloads & splits?
305 ldx [%i0+40], %l5
306 ldx [%i0+48], %l6
307 ldx [%i0+56], %l7
341 ldx [%i0+0], %l0
345 ldx [%i0+8], %l1
[all …]
/titanic_44/usr/src/uts/sun4v/ml/
H A Dmach_proc_init.s93 ldx [%l1 + LPAD_MAGIC], %g2
102 ldx [%l1 + LPAD_NMAP], %l2 ! %l2 = number of mappings
120 ldx [%l3 + LPAD_MAP_FLAGS], %l4 ! %l4 = flags
125 ldx [%l3 + LPAD_MAP_VA], %o0 ! %o0 = virtual address
127 ldx [%l3 + LPAD_MAP_TTE], %o2 ! %o2 = TTE
161 ldx [%l1 + LPAD_MMFSA_RA], %o0
176 ldx [%l1 + LPAD_PC], %l3 ! %l3 = specified entry point
177 ldx [%l1 + LPAD_ARG], %l4 ! %l4 = specified argument
178 ldx [%l1 + LPAD_INUSE], %l5 ! %l5 = va of inuse mailbox
H A Dtrap_table.s527 ldx [%sp + V9BIAS64 + 0], %l0 ;\
528 ldx [%sp + V9BIAS64 + 8], %l1 ;\
529 ldx [%sp + V9BIAS64 + 16], %l2 ;\
530 ldx [%sp + V9BIAS64 + 24], %l3 ;\
531 ldx [%sp + V9BIAS64 + 32], %l4 ;\
532 ldx [%sp + V9BIAS64 + 40], %l5 ;\
533 ldx [%sp + V9BIAS64 + 48], %l6 ;\
534 ldx [%sp + V9BIAS64 + 56], %l7 ;\
535 ldx [%sp + V9BIAS64 + 64], %i0 ;\
536 ldx [%sp + V9BIAS64 + 72], %i1 ;\
[all …]
H A Dmach_subr_asm.s128 ldx [%g2 + MCPU_CPU_Q_BASE], %o1
133 ldx [%g2 + MCPU_DEV_Q_BASE], %o1
138 ldx [%g2 + MCPU_RQ_BASE], %o1
143 ldx [%g2 + MCPU_NRQ_BASE], %o1
/titanic_44/usr/src/uts/sun4v/vm/
H A Dmach_sfmmu.h134 ldx [ctxtype + MMFSA_D_ADDR], ptagacc; \
135 ldx [ctxtype + MMFSA_D_CTX], ctxtype; \
163 ldx [ttarget + MMFSA_D_CTX], scr1; \
165 ldx [ttarget + MMFSA_D_ADDR], ttarget; \
181 ldx [scr1 + MMFSA_D_ADDR], scr2; \
182 ldx [scr1 + MMFSA_D_CTX], dtagacc; \
188 ldx [scr1 + MMFSA_I_ADDR], scr2; \
189 ldx [scr1 + MMFSA_I_CTX], itagacc; \
206 ldx [scr1 + MMFSA_D_ADDR], daddr
221 ldx [ctxtype + MMFSA_I_ADDR], ptagacc; \
[all …]
H A Dmach_sfmmu_asm.s114 ldx [%g3 + %lo(ksfmmup)], %g3
172 ldx [%g5 + TSBMISS_UHATID], %g5 /* load usfmmup */
282 ldx [%o3 + %lo(ksfmmup)], %o3
318 ldx [%o0 + SFMMU_TSB], %o1 ! %o1 = first tsbinfo
319 ldx [%o1 + TSBINFO_NEXTPTR], %g2 ! %g2 = second tsbinfo
336 ldx [%o0 + SFMMU_SCDP], %g2 ! %g2 = sfmmu_scd
340 ldx [%g2 + SCD_SFMMUP], %g3 ! %g3 = scdp->scd_sfmmup
341 ldx [%g3 + SFMMU_TSB], %o1 ! %o1 = first scd tsbinfo
355 ldx [%o1 + TSBINFO_NEXTPTR], %g2 ! %g2 = second scd tsbinfo
379 ldx [%o3 + SFMMU_HVBLOCK + HV_TSB_INFO_CNT], %o0
[all …]
/titanic_44/usr/src/uts/sun4u/opl/ml/
H A Ddrmach_asm.s88 ldx [%o3], %o4
205 ldx [%o2], %o4
242 ldx [%o1+8*0], %l0
243 ldx [%o1+8*1], %l1
244 ldx [%o1+8*2], %l2
245 ldx [%o1+8*3], %l3
246 ldx [%o1+8*4], %l4
247 ldx [%o1+8*5], %l5
248 ldx [%o1+8*6], %l6
249 ldx [%o1+8*7], %l7
[all …]
/titanic_44/usr/src/lib/libc/sparcv9/crt/
H A D__align_cpy_8.s81 ldx [%o1], %o3
89 ldx [%o1+8], %o4
95 ldx [%o1], %o3
98 ldx [%o1], %o3
104 ldx [%o1], %o3 ! Copy last 8 bytes.
/titanic_44/usr/src/uts/sparc/v9/ml/
H A Dsyscall_trap.s164 ldx [%l1 + G1_OFF], %g1 ! get code
204 ldx [%l1 + TSTATE_OFF], %g2 ! get saved tstate
234 ldx [%l1 + TSTATE_OFF], %g1 ! get saved tstate
253 ldx [%l1 + G1_OFF], %g1
259 ldx [%l1 + O0_OFF], %o0 ! reload args
260 ldx [%l1 + O1_OFF], %o1
261 ldx [%l1 + O2_OFF], %o2
262 ldx [%l1 + O3_OFF], %o3
263 ldx [%l1 + O4_OFF], %o4
265 ldx [%l1 + O5_OFF], %o5
[all …]
/titanic_44/usr/src/uts/sun4u/starcat/ml/
H A Ddrmach_asm.s106 ldx [reg1], reg2 ;\
116 ldx [reg1], reg1 ;\
479 ldx [%o0], %o1 ! run section 2
488 ldx [%o0 + 8], %o1
493 ldx [%o0], %o1 ! run section 3
502 ldx [%o0 + 8], %o1
507 ldx [%o0], %o1 ! run section 4
510 ldx [%o0 + 8], %o2
517 ldx [%o0], %o1 ! run section 5
520 ldx [%o0 + 8], %o2
[all …]
/titanic_44/usr/src/uts/sun4u/ml/
H A Dzulu_asm.s102 ldx [%g7 + ZULUVM_ASM_TLB_TYPE], %g4
134 ldx [%g7 + ZULUVM_ASM_TLB_ADDR], %g1 ! vaddr(tag)
144 ldx [%g6], %g3
163 ldx [%g7 + ZULUVM_ASM_TLB_TYPE], %g3
222 ldx [%g7 + ZULUVM_ASM_TLB_TYPE], %g5
225 ldx [%g7 + ZULUVM_ASM_TLB_TYPE], %g3
227 ldx [%g7 + ZULUVM_ARG], %g6
/titanic_44/usr/src/cmd/mdb/sun4v/v9/kmdb/
H A Dmach_asmutil.h63 ldx [%g5 + KREG_OFF(KREG_O5)], %o5 /* restore saved %o5 */; \
64 ldx [%g5 + KREG_OFF(KREG_O4)], %o4 /* restore saved %o4 */; \
66 ldx [%g5 + KREG_OFF(KREG_O3)], %o3 /* restore saved %o3 */
/titanic_44/usr/src/uts/sun4u/sys/
H A Dmachclock.h120 ldx [scr + %lo(hres_last_tick)], nslt; \
127 ldx [scr + %lo(hrestime_adj)], adj; /* load hrestime_adj */ \
145 ldx [scr + %lo(hres_last_tick)], nslt; \
146 ldx [scr + %lo(hrtime_base)], base; /* load hrtime_base */ \
/titanic_44/usr/src/lib/libc/sparcv9/gen/
H A Dstrcmp.s92 ldx [%o1], %o0 ! new lower dword in s2
105 ldx [%o1+8], %o0 ! next aligned word in s2
109 ldx [%o1 + %o2], %o3 ! word from s1
127 ldx [%o1 + %o2], %o3 ! load word from s1
130 ldx [%o1], %g1 ! load word from s2
138 ldx [%o1 + %o2], %o3 ! load word from s1
/titanic_44/usr/src/uts/sun4u/cpu/
H A Dopl_olympus_asm.s102 ldx [%o3 + %lo(ksfmmup)], %o3
196 ldx [%g3 + %lo(ksfmmup)], %g3
263 ldx [%g4 + %lo(ksfmmup)], %g4
629 ldx [scr1 + TRAPTR_PBASE], ptr; \
834 ldx [tmp1 + %lo(hres_last_tick)], tmp1 ;\
846 ldx [tmp], %fsr ;\
1009 ldx [tmp2 + %lo(kcontextreg)], tmp2 ;\
1014 ldx [tmp1 + %lo(ktsb_base)], tmp2 ;\
1112 ldx [tmp + CPU_THREAD], local ;\
1113 ldx [local + T_STACK], tmp ;\
[all …]

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