/titanic_44/usr/src/uts/sun4u/io/ |
H A D | sbbc.c | 119 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 121 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 123 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 125 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 610 sbbc_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in sbbc_intr_ops() argument 615 switch (intr_op) { in sbbc_intr_ops() 638 ret = sbbc_add_intr_impl(dip, rdip, intr_op, hdlp, result); in sbbc_intr_ops() 641 ret = sbbc_remove_intr_impl(dip, rdip, intr_op, hdlp, result); in sbbc_intr_ops() 644 ret = sbbc_update_intr_state(dip, rdip, intr_op, hdlp, &result); in sbbc_intr_ops() 647 ret = sbbc_update_intr_state(dip, rdip, intr_op, hdlp, &result); in sbbc_intr_ops() [all …]
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H A D | upa64s.c | 60 upa64_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, 710 upa64_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in upa64_intr_ops() argument 715 switch (intr_op) { in upa64_intr_ops() 760 ret = i_ddi_intr_ops(dip, rdip, intr_op, hdlp, result); in upa64_intr_ops()
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/titanic_44/usr/src/uts/common/io/pci-ide/ |
H A D | pci-ide.c | 99 ddi_intr_op_t intr_op, 704 pciide_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in pciide_intr_ops() argument 712 (void *)dip, (void *)rdip, intr_op, (void *)hdlp)); in pciide_intr_ops() 714 switch (intr_op) { in pciide_intr_ops() 761 rdip, intr_op, hdlp, result); in pciide_intr_ops() 764 if (intr_op == DDI_INTROP_ENABLE) { in pciide_intr_ops()
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/titanic_44/usr/src/uts/common/xen/io/ |
H A D | xpvd.c | 445 xpvd_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, in xpvd_intr_ops() argument 454 (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); in xpvd_intr_ops() 457 switch (intr_op) { in xpvd_intr_ops() 603 if (intr_op == DDI_INTROP_SETMASK) { in xpvd_intr_ops() 629 return (i_ddi_intr_ops(pdip, rdip, intr_op, hdlp, result)); in xpvd_intr_ops()
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/titanic_44/usr/src/uts/sparc/io/pciex/ |
H A D | pcieb_sparc.c | 70 pcieb_plat_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in pcieb_plat_intr_ops() argument 78 if ((intr_op == DDI_INTROP_SUPPORTED_TYPES) || in pcieb_plat_intr_ops() 119 return (i_ddi_intr_ops(dip, rdip, intr_op, hdlp, result)); in pcieb_plat_intr_ops()
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/titanic_44/usr/src/uts/intel/io/pci/ |
H A D | pci_pci.c | 868 ppb_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, in ppb_intr_ops() argument 874 if (intr_op != DDI_INTROP_SUPPORTED_TYPES) in ppb_intr_ops() 875 return (i_ddi_intr_ops(pdip, rdip, intr_op, hdlp, result)); in ppb_intr_ops() 879 (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); in ppb_intr_ops() 893 rv = i_ddi_intr_ops(pdip, rdip, intr_op, hdlp, result); in ppb_intr_ops() 909 rv = i_ddi_intr_ops(pdip, rdip, intr_op, hdlp, result); in ppb_intr_ops()
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/titanic_44/usr/src/uts/sun4v/io/ |
H A D | vnex.c | 110 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 544 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result) in vnex_intr_ops() argument 548 switch (intr_op) { in vnex_intr_ops()
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/titanic_44/usr/src/uts/i86pc/io/pcplusmp/ |
H A D | apic_introp.c | 756 psm_intr_op_t intr_op, int *result) in apic_intr_ops() argument 767 "intr_op: %x\n", (void *)dip, (void *)hdlp, intr_op)); in apic_intr_ops() 774 switch (intr_op) { in apic_intr_ops() 916 if (intr_op == PSM_INTR_OP_SET_CPU) { in apic_intr_ops()
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/titanic_44/usr/src/uts/sun4/io/ |
H A D | ebus.c | 72 ebus_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, 764 ebus_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in ebus_intr_ops() argument 779 switch (intr_op) { in ebus_intr_ops() 856 return (i_ddi_intr_ops(dip, rdip, intr_op, hdlp, result)); in ebus_intr_ops()
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H A D | rootnex.c | 644 rootnex_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in rootnex_intr_ops() argument 651 ddi_get_instance(rdip), intr_op, (void *)hdlp)); in rootnex_intr_ops() 653 switch (intr_op) { in rootnex_intr_ops()
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/titanic_44/usr/src/uts/sun4/io/px/ |
H A D | px_intr.c | 477 px_intx_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in px_intx_ops() argument 484 "handle=%p\n", dip, rdip, intr_op, hdlp); in px_intx_ops() 486 switch (intr_op) { in px_intx_ops() 549 px_msix_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in px_msix_ops() argument 563 "handle=%p\n", dip, rdip, intr_op, hdlp); in px_msix_ops() 580 switch (intr_op) { in px_msix_ops()
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H A D | px_var.h | 179 px_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op,
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H A D | px.c | 1382 px_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in px_intr_ops() argument 1392 if (intr_op == DDI_INTROP_SUPPORTED_TYPES) { in px_intr_ops() 1418 ret = px_intx_ops(dip, rdip, intr_op, hdlp, result); in px_intr_ops() 1422 ret = px_msix_ops(dip, rdip, intr_op, hdlp, result); in px_intr_ops()
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/titanic_44/usr/src/uts/sun4u/montecarlo/io/ |
H A D | acebus.c | 70 acebus_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, 676 acebus_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in acebus_intr_ops() argument 689 switch (intr_op) { in acebus_intr_ops() 768 return (i_ddi_intr_ops(dip, rdip, intr_op, hdlp, result)); in acebus_intr_ops()
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/titanic_44/usr/src/uts/common/io/pciex/ |
H A D | pcieb.h | 174 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result);
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/titanic_44/usr/src/uts/i86pc/io/pci/ |
H A D | pci_common.c | 190 pci_common_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, in pci_common_intr_ops() argument 216 (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); in pci_common_intr_ops() 219 switch (intr_op) { in pci_common_intr_ops() 656 if (intr_op == DDI_INTROP_SETMASK) { in pci_common_intr_ops() 689 if (intr_op == DDI_INTROP_SETMASK) in pci_common_intr_ops() 771 return (i_ddi_intr_ops(pdip, rdip, intr_op, hdlp, result)); in pci_common_intr_ops()
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H A D | pci.c | 654 pci_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, in pci_intr_ops() argument 657 return (pci_common_intr_ops(pdip, rdip, intr_op, hdlp, result)); in pci_intr_ops()
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/titanic_44/usr/src/uts/intel/io/pciex/ |
H A D | pcieb_x86.c | 103 pcieb_plat_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in pcieb_plat_intr_ops() argument 106 return (i_ddi_intr_ops(dip, rdip, intr_op, hdlp, result)); in pcieb_plat_intr_ops()
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/titanic_44/usr/src/uts/i86pc/io/ |
H A D | isa.c | 166 isa_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 773 isa_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, in isa_intr_ops() argument 783 return (i_ddi_intr_ops(pdip, rdip, intr_op, hdlp, result)); in isa_intr_ops() 787 switch (intr_op) { in isa_intr_ops()
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/titanic_44/usr/src/uts/sun4v/io/niumx/ |
H A D | niumx.c | 50 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 811 niumx_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in niumx_intr_ops() argument 818 "handle=%p\n", dip, rdip, intr_op, hdlp); in niumx_intr_ops() 820 switch (intr_op) { in niumx_intr_ops()
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/titanic_44/usr/src/uts/sun4u/sys/pci/ |
H A D | pci_var.h | 243 pci_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op,
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/titanic_44/usr/src/uts/common/io/ |
H A D | i8042.c | 281 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 1352 i8042_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in i8042_intr_ops() argument 1361 switch (intr_op) { in i8042_intr_ops() 1366 if (i_ddi_intr_ops(dip, rdip, intr_op, hdlp, result) in i8042_intr_ops()
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/titanic_44/usr/src/uts/sun4u/io/pci/ |
H A D | pci_pci.c | 95 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 659 ppb_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in ppb_intr_ops() argument 667 if ((intr_op == DDI_INTROP_SUPPORTED_TYPES) || in ppb_intr_ops() 707 return (i_ddi_intr_ops(dip, rdip, intr_op, hdlp, result)); in ppb_intr_ops()
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/titanic_44/usr/src/uts/i86xpv/io/psm/ |
H A D | xpv_psm.c | 638 psm_intr_op_t intr_op, int *result) in xen_intr_ops() argument 647 "intr_op: %x\n", (void *)dip, (void *)hdlp, intr_op)); in xen_intr_ops() 649 switch (intr_op) { in xen_intr_ops()
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/titanic_44/usr/src/uts/common/sys/ |
H A D | sservice.h | 554 int pcmcia_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op,
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