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Searched refs:interrupts (Results 1 – 25 of 47) sorted by relevance

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/titanic_44/usr/src/uts/common/io/nxge/
H A Dnxge_intr.c75 nxge_intr_t *interrupts; /* The global interrupt data. */ in nxge_intr_add() local
102 interrupts = (nxge_intr_t *)&nxge->nxge_intr_type; in nxge_intr_add()
106 if ((status2 = ddi_intr_add_handler(interrupts->htable[vector], in nxge_intr_add()
115 interrupts->intr_added++; in nxge_intr_add()
118 if ((status2 = ddi_intr_enable(interrupts->htable[vector])) in nxge_intr_add()
127 interrupts->intr_enabled = B_TRUE; in nxge_intr_add()
165 nxge_intr_t *interrupts; /* The global interrupt data. */ in nxge_intr_remove() local
194 interrupts = (nxge_intr_t *)&nxge->nxge_intr_type; in nxge_intr_remove()
199 if ((status2 = ddi_intr_disable(interrupts->htable[vector])) in nxge_intr_remove()
208 if ((status2 = ddi_intr_remove_handler(interrupts->htable[vector])) in nxge_intr_remove()
[all …]
/titanic_44/usr/src/uts/sun/io/
H A Dzs.conf28 reg=0x210,0xf1000000,0x4 interrupts=12;
31 reg=0x210,0xf0000000,0x4 interrupts=12;
36 reg=0x210,0xe0000004,0x4 interrupts=12;
/titanic_44/usr/src/uts/i86pc/ml/
H A Damd64.il69 / enable interrupts
76 / disable interrupts
83 / disable interrupts and return value describing if interrupts were enabled
164 * This function should be called with interrupts already disabled
166 * Note that "sti" will only enable interrupts at the end of the
H A Dia32.il56 / enable interrupts
63 / disable interrupts
70 / disable interrupts and return value describing if interrupts were enabled
160 * This function should be called with interrupts already disabled
162 * Note that "sti" will only enable interrupts at the end of the
H A Dinterrupt.s164 / interrupt (note that interrupts are still disabled from splx()).
H A Dsyscall_asm.s617 / doesn't enable interrupts too soon.
/titanic_44/usr/src/uts/sun4u/io/
H A Dpanther_asm.s144 ! since we disable interrupts, we don't need to do kpreempt_disable()
216 ! since we disable interrupts, we don't need to do kpreempt_disable()
276 wrpr %g0, %g1, %pstate ! disable interrupts
344 wrpr %g0, %g1, %pstate ! disable interrupts
399 ! since we disable interrupts, we don't need to do kpreempt_disable()
469 ! since we disable interrupts, we don't need to do kpreempt_disable()
527 wrpr %g0, %g1, %pstate ! disable interrupts
593 wrpr %g0, %g1, %pstate ! disable interrupts
H A Dzuluvm.c1333 if (zdev->interrupts[i].ino != -1) { in zuluvm_do_retarget()
1335 idx = zdev->interrupts[i].offset; in zuluvm_do_retarget()
1385 zdev->imr[zdev->interrupts[ino].offset] &= ~ZULUVM_IMR_V_MASK; in zuluvm_rem_intr()
1461 zdev->interrupts[i].offset = 0; in zuluvm_get_intr_props()
1462 zdev->interrupts[i].ino = -1; in zuluvm_get_intr_props()
1483 zdev->interrupts[i].offset = intr[i]; in zuluvm_get_intr_props()
1484 zdev->interrupts[i].ino = i; in zuluvm_get_intr_props()
/titanic_44/usr/src/uts/common/io/dmfe/
H A Ddmfe_main.c1754 uint32_t interrupts; in dmfe_interrupt() local
1790 interrupts = istat & dmfep->imask; in dmfe_interrupt()
1791 ASSERT(interrupts != 0); in dmfe_interrupt()
1800 if (interrupts & ~(RX_PKTDONE_INT | TX_PKTDONE_INT)) { in dmfe_interrupt()
1813 if (interrupts & SYSTEM_ERR_INT) { in dmfe_interrupt()
1831 } else if (interrupts & RX_STOPPED_INT) { in dmfe_interrupt()
1833 } else if (interrupts & RX_UNAVAIL_INT) { in dmfe_interrupt()
1836 } else if (interrupts & RX_WATCHDOG_INT) { in dmfe_interrupt()
1838 } else if (interrupts & RX_EARLY_INT) { in dmfe_interrupt()
1840 } else if (interrupts & TX_STOPPED_INT) { in dmfe_interrupt()
[all …]
/titanic_44/usr/src/uts/sun4u/montecarlo/io/
H A Dse.conf32 interrupts=1
/titanic_44/usr/src/uts/sun4u/io/pci/
H A Dpci_asm.s67 rdpr %pstate, %o4 ! Disable interrupts if not already
106 tst %g2 ! No need to reenable interrupts
/titanic_44/usr/src/uts/sun4u/io/px/
H A Dpx_asm_4u.s71 rdpr %pstate, %o4 ! Disable interrupts if not already
110 tst %g2 ! No need to reenable interrupts
/titanic_44/usr/src/uts/sun4u/sys/
H A Dzulumod.h197 zuluvm_intr_t interrupts[ZULUVM_MAX_INTR]; member
200 #define ZULUVM_INTR_OFFSET offsetof(zuluvm_state_t, interrupts)
/titanic_44/usr/src/uts/sun4u/cpu/
H A Dus3_common_asm.s2592 wrpr %g0, %g3, %pstate ! turn off interrupts
2934 wrpr %g0, %o2, %pstate ! disable interrupts
2964 andn %l1, PSTATE_IE, %l2 ! disable interrupts to
2993 wrpr %g0, %l1, %pstate ! restore interrupts
3008 wrpr %g0, %l1, %pstate ! restore interrupts
3139 wrpr %o3, PSTATE_IE, %pstate ! Disable interrupts
3150 wrpr %g0, %o3, %pstate ! Enable interrupts
3187 wrpr %g0, %o3, %pstate ! Enable interrupts
3212 wrpr %o3, PSTATE_IE, %pstate ! Disable interrupts
3223 wrpr %g0, %o3, %pstate ! Enable interrupts
H A Dcommon_asm.s336 andcc %g1, PSTATE_IE, %g0 ! If DEBUG, check that interrupts
1111 andcc %g1, PSTATE_IE, %g0 ! If DEBUG, check that interrupts
1119 wrpr %g1, PSTATE_IE, %pstate ! Disable interrupts
1142 wrpr %g0, %g1, %pstate ! delay: re-enable interrupts
/titanic_44/usr/src/uts/sun4/ml/
H A Dswtch.s225 ! disable interrupts
233 ! enable interrupts
/titanic_44/usr/src/uts/sun4v/io/
H A Dvnet_dds.c875 int interrupts[VDDS_MAX_VRINTRS]; in vdds_new_niu_node() local
1016 rv = vdds_get_interrupts(cba->cookie, rnum, interrupts, &nintr); in vdds_new_niu_node()
1025 interrupts, nintr) != DDI_SUCCESS) { in vdds_new_niu_node()
/titanic_44/usr/src/uts/common/io/
H A Di8042.c1634 int interrupts[MAX_INTERRUPTS]; in i8042_build_interrupts_property() local
1645 interrupts[i++] = intrs[--nintr]; in i8042_build_interrupts_property()
1654 interrupts, i) != DDI_PROP_SUCCESS) { in i8042_build_interrupts_property()
/titanic_44/usr/src/uts/sun4u/vm/
H A Dmach_sfmmu_asm.s185 wrpr %o3, PSTATE_IE, %pstate ! Disable interrupts
/titanic_44/usr/src/uts/common/io/aac/
H A DREADME72 MSI interrupts supporting is added in this release:
/titanic_44/usr/src/grub/grub-0.97/docs/
H A Dinternals.texi20 * Low-level disk I/O:: INT 13H disk I/O interrupts
40 BIOS and real mode interrupts
369 @section INT 13H disk I/O interrupts
/titanic_44/usr/src/uts/sun4u/ml/
H A Dmach_interrupt.s241 ! just knowing that spurious interrupts happened is enough,
H A Dmach_locore.s1617 rdpr %pstate, %l4 ! disable interrupts
1650 rdpr %pstate, %l4 ! disable interrupts
/titanic_44/usr/src/uts/sparc/dtrace/
H A Ddtrace_asm.s228 ! (interrupts are disabled in dtrace_probe()), but possible (the
/titanic_44/usr/src/uts/sun4u/starfire/ml/
H A Didn_asm.s365 ! interrupt. IDN interrupts could exhaust the

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