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Searched refs:hpi_status_t (Results 1 – 18 of 18) sorted by relevance

/titanic_44/usr/src/uts/common/io/hxge/
H A Dhpi_pfc.h107 hpi_status_t hpi_pfc_set_tcam_enable(hpi_handle_t, boolean_t);
108 hpi_status_t hpi_pfc_set_l2_hash(hpi_handle_t, boolean_t);
109 hpi_status_t hpi_pfc_set_tcp_cksum(hpi_handle_t, boolean_t);
110 hpi_status_t hpi_pfc_set_default_dma(hpi_handle_t, uint32_t);
111 hpi_status_t hpi_pfc_mac_addr_enable(hpi_handle_t, uint32_t);
112 hpi_status_t hpi_pfc_mac_addr_disable(hpi_handle_t, uint32_t);
113 hpi_status_t hpi_pfc_set_force_csum(hpi_handle_t, boolean_t);
118 hpi_status_t hpi_pfc_cfg_vlan_table_clear(hpi_handle_t);
119 hpi_status_t hpi_pfc_cfg_vlan_table_entry_clear(hpi_handle_t, vlan_id_t);
120 hpi_status_t hpi_pfc_cfg_vlan_table_entry_set(hpi_handle_t, vlan_id_t);
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H A Dhpi_txdma.h103 hpi_status_t hpi_txdma_log_page_handle_set(hpi_handle_t handle,
105 hpi_status_t hpi_txdma_channel_reset(hpi_handle_t handle, uint8_t channel);
106 hpi_status_t hpi_txdma_channel_init_enable(hpi_handle_t handle,
108 hpi_status_t hpi_txdma_channel_enable(hpi_handle_t handle, uint8_t channel);
109 hpi_status_t hpi_txdma_channel_disable(hpi_handle_t handle, uint8_t channel);
110 hpi_status_t hpi_txdma_channel_mbox_enable(hpi_handle_t handle,
112 hpi_status_t hpi_txdma_channel_control(hpi_handle_t handle,
114 hpi_status_t hpi_txdma_control_status(hpi_handle_t handle, io_op_t op_mode,
117 hpi_status_t hpi_txdma_event_mask(hpi_handle_t handle, io_op_t op_mode,
120 hpi_status_t hpi_txdma_ring_config(hpi_handle_t handle, io_op_t op_mode,
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H A Dhpi_vmac.h36 hpi_status_t hpi_tx_vmac_reset(hpi_handle_t handle);
37 hpi_status_t hpi_rx_vmac_reset(hpi_handle_t handle);
38 hpi_status_t hpi_vmac_tx_config(hpi_handle_t handle, config_op_t op,
40 hpi_status_t hpi_vmac_rx_config(hpi_handle_t handle, config_op_t op,
42 hpi_status_t hpi_vmac_clear_rx_int_stat(hpi_handle_t handle);
43 hpi_status_t hpi_vmac_clear_tx_int_stat(hpi_handle_t handle);
44 hpi_status_t hpi_pfc_set_rx_int_stat_mask(hpi_handle_t handle,
46 hpi_status_t hpi_pfc_set_tx_int_stat_mask(hpi_handle_t handle,
48 hpi_status_t hpi_vmac_rx_set_framesize(hpi_handle_t handle,
H A Dhpi_pfc.c86 hpi_status_t
116 hpi_status_t
142 hpi_status_t
170 static hpi_status_t
181 static hpi_status_t
192 hpi_status_t
210 hpi_status_t
228 hpi_status_t
246 hpi_status_t
261 hpi_status_t
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H A Dhpi_rxdma.h166 hpi_status_t hpi_rxdma_cfg_rdc_wait_for_qst(hpi_handle_t handle, uint8_t rdc);
167 hpi_status_t hpi_rxdma_cfg_rdc_ring(hpi_handle_t handle, uint8_t rdc,
169 hpi_status_t hpi_rxdma_cfg_clock_div_set(hpi_handle_t handle, uint16_t count);
170 hpi_status_t hpi_rxdma_cfg_logical_page_handle(hpi_handle_t handle, uint8_t rdc,
173 hpi_status_t hpi_rxdma_rdc_rbr_stat_get(hpi_handle_t handle, uint8_t rdc,
175 hpi_status_t hpi_rxdma_cfg_rdc_reset(hpi_handle_t handle, uint8_t rdc);
176 hpi_status_t hpi_rxdma_cfg_rdc_enable(hpi_handle_t handle, uint8_t rdc);
177 hpi_status_t hpi_rxdma_cfg_rdc_disable(hpi_handle_t handle, uint8_t rdc);
178 hpi_status_t hpi_rxdma_cfg_rdc_rcr_timeout(hpi_handle_t handle, uint8_t rdc,
181 hpi_status_t hpi_rxdma_cfg_rdc_rcr_threshold(hpi_handle_t handle, uint8_t rdc,
[all …]
H A Dhpi_vir.h93 hpi_status_t hpi_fzc_ldg_num_set(hpi_handle_t handle, uint8_t ld, uint8_t ldg);
94 hpi_status_t hpi_ldsv_ldfs_get(hpi_handle_t handle, uint8_t ldg,
96 hpi_status_t hpi_ldsv_get(hpi_handle_t handle, uint8_t ldg, ldsv_type_t vector,
98 hpi_status_t hpi_intr_mask_set(hpi_handle_t handle, uint8_t ld,
100 hpi_status_t hpi_intr_ldg_mgmt_set(hpi_handle_t handle, uint8_t ldg,
102 hpi_status_t hpi_fzc_ldg_timer_res_set(hpi_handle_t handle, uint32_t res);
103 hpi_status_t hpi_fzc_sid_set(hpi_handle_t handle, fzc_sid_t sid);
104 hpi_status_t hpi_fzc_sys_err_mask_set(hpi_handle_t handle, boolean_t mask);
105 hpi_status_t hpi_fzc_sys_err_stat_get(hpi_handle_t handle,
H A Dhpi_txdma.c34 static hpi_status_t hpi_txdma_control_reset_wait(hpi_handle_t handle,
37 hpi_status_t
55 hpi_status_t
63 hpi_status_t
69 hpi_status_t
75 hpi_status_t
81 hpi_status_t
87 hpi_status_t
166 hpi_status_t
204 hpi_status_t
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H A Dhpi_vir.c35 hpi_status_t
63 hpi_status_t
82 hpi_status_t
117 hpi_status_t
143 hpi_status_t
182 hpi_status_t
205 hpi_status_t
234 hpi_status_t
256 hpi_status_t
H A Dhpi_rxdma.c41 hpi_status_t
62 hpi_status_t
83 static hpi_status_t
157 hpi_status_t
163 hpi_status_t
169 hpi_status_t
175 static hpi_status_t
213 hpi_status_t
221 hpi_status_t
232 hpi_status_t
[all …]
H A Dhpi_vmac.c34 hpi_status_t
48 hpi_status_t
63 hpi_status_t
128 hpi_status_t
152 hpi_status_t
245 hpi_status_t
256 hpi_status_t
267 hpi_status_t
286 hpi_status_t
H A Dhxge_fzc.c72 hpi_status_t rs = HPI_SUCCESS; in hxge_fzc_intr_ldg_num_set()
117 hpi_status_t rs = HPI_SUCCESS; in hxge_fzc_intr_tmres_set()
140 hpi_status_t rs = HPI_SUCCESS; in hxge_fzc_intr_sid_set()
198 hpi_status_t rs = HPI_SUCCESS; in hxge_init_fzc_rxdma_channel_pages()
236 hpi_status_t rs = HPI_SUCCESS; in hxge_init_fzc_rx_common()
266 hpi_status_t rs = HPI_SUCCESS; in hxge_init_fzc_txdma_channel_pages()
286 hpi_status_t rs = HPI_SUCCESS; in hxge_fzc_sys_err_mask_set()
H A Dhxge_pfc.c74 hpi_status_t status; in hxge_tcam_dump_entry()
165 hpi_status_t rs = HPI_SUCCESS; in hxge_tcam_default_add_entry()
451 hpi_status_t status; in hxge_pfc_clear_mac_address()
466 hpi_status_t hpi_status; in hxge_pfc_set_mac_address()
512 hpi_status_t rs = HPI_SUCCESS; in hxge_pfc_set_hash()
539 hpi_status_t hpi_status; in hxge_pfc_config_tcam_enable()
563 hpi_status_t hpi_status; in hxge_pfc_config_tcam_disable()
586 hpi_status_t rs = HPI_SUCCESS; in hxge_cfg_tcam_ip_class_get()
685 hpi_status_t rs = HPI_SUCCESS; in hxge_pfc_tcam_invalidate_all()
712 hpi_status_t rs = HPI_SUCCESS; in hxge_pfc_tcam_init()
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H A Dhxge_vmac.c166 hpi_status_t rv; in hxge_tx_vmac_enable()
193 hpi_status_t rv; in hxge_tx_vmac_disable()
213 hpi_status_t rv; in hxge_rx_vmac_enable()
253 hpi_status_t rv; in hxge_rx_vmac_disable()
H A Dhpi.h39 typedef uint32_t hpi_status_t; typedef
H A Dhxge_txdma.c154 hpi_status_t rs = HPI_SUCCESS; in hxge_reset_txdma_channel()
187 hpi_status_t rs = HPI_SUCCESS; in hxge_init_txdma_channel_event_mask()
216 hpi_status_t rs = HPI_SUCCESS; in hxge_enable_txdma_channel()
815 hpi_status_t rs = HPI_SUCCESS; in hxge_tx_intr()
916 hpi_status_t rs = HPI_SUCCESS; in hxge_txdma_hw_mode()
1020 hpi_status_t rs = HPI_SUCCESS; in hxge_txdma_stop_inj_err()
2729 hpi_status_t rs = HPI_SUCCESS; in hxge_txdma_fatal_err_recover()
2836 hpi_status_t rs = HPI_SUCCESS; in hxge_tx_port_fatal_err_recover()
H A Dhxge_rxdma.c164 hpi_status_t rs = HPI_SUCCESS; in hxge_init_rxdma_channel_cntl_stat()
188 hpi_status_t rs = HPI_SUCCESS; in hxge_enable_rxdma_channel()
286 hpi_status_t rs = HPI_SUCCESS; in hxge_disable_rxdma_channel()
777 hpi_status_t rs = HPI_SUCCESS; in hxge_rxdma_hw_mode()
3327 hpi_status_t rs = HPI_SUCCESS; in hxge_rxdma_start_channel()
3438 hpi_status_t rs = HPI_SUCCESS; in hxge_rxdma_stop_channel()
3579 hpi_status_t rs = HPI_SUCCESS; in hxge_rxdma_fatal_err_recover()
3822 hpi_status_t hpi_status; in hxge_rbr_empty_restore()
H A Dhxge_virtual.c729 hpi_status_t rs = HPI_SUCCESS; in hxge_intr_mask_mgmt()
806 hpi_status_t rs = HPI_SUCCESS; in hxge_intr_mask_mgmt_set()
H A Dhxge_hw.c121 hpi_status_t rs = HPI_SUCCESS; in hxge_intr()