| /titanic_44/usr/src/uts/common/io/hxge/ |
| H A D | hpi_pfc.h | 107 hpi_status_t hpi_pfc_set_tcam_enable(hpi_handle_t, boolean_t);
108 hpi_status_t hpi_pfc_set_l2_hash(hpi_handle_t, boolean_t);
109 hpi_status_t hpi_pfc_set_tcp_cksum(hpi_handle_t, boolean_t);
110 hpi_status_t hpi_pfc_set_default_dma(hpi_handle_t, uint32_t);
111 hpi_status_t hpi_pfc_mac_addr_enable(hpi_handle_t, uint32_t);
112 hpi_status_t hpi_pfc_mac_addr_disable(hpi_handle_t, uint32_t);
113 hpi_status_t hpi_pfc_set_force_csum(hpi_handle_t, boolean_t);
118 hpi_status_t hpi_pfc_cfg_vlan_table_clear(hpi_handle_t);
119 hpi_status_t hpi_pfc_cfg_vlan_table_entry_clear(hpi_handle_t, vlan_id_t);
120 hpi_status_t hpi_pfc_cfg_vlan_table_entry_set(hpi_handle_t, vlan_id_t);
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| H A D | hpi_txdma.h | 103 hpi_status_t hpi_txdma_log_page_handle_set(hpi_handle_t handle,
105 hpi_status_t hpi_txdma_channel_reset(hpi_handle_t handle, uint8_t channel);
106 hpi_status_t hpi_txdma_channel_init_enable(hpi_handle_t handle,
108 hpi_status_t hpi_txdma_channel_enable(hpi_handle_t handle, uint8_t channel);
109 hpi_status_t hpi_txdma_channel_disable(hpi_handle_t handle, uint8_t channel);
110 hpi_status_t hpi_txdma_channel_mbox_enable(hpi_handle_t handle,
112 hpi_status_t hpi_txdma_channel_control(hpi_handle_t handle,
114 hpi_status_t hpi_txdma_control_status(hpi_handle_t handle, io_op_t op_mode,
117 hpi_status_t hpi_txdma_event_mask(hpi_handle_t handle, io_op_t op_mode,
120 hpi_status_t hpi_txdma_ring_config(hpi_handle_t handle, io_op_t op_mode,
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| H A D | hpi_vmac.h | 36 hpi_status_t hpi_tx_vmac_reset(hpi_handle_t handle);
37 hpi_status_t hpi_rx_vmac_reset(hpi_handle_t handle);
38 hpi_status_t hpi_vmac_tx_config(hpi_handle_t handle, config_op_t op,
40 hpi_status_t hpi_vmac_rx_config(hpi_handle_t handle, config_op_t op,
42 hpi_status_t hpi_vmac_clear_rx_int_stat(hpi_handle_t handle);
43 hpi_status_t hpi_vmac_clear_tx_int_stat(hpi_handle_t handle);
44 hpi_status_t hpi_pfc_set_rx_int_stat_mask(hpi_handle_t handle,
46 hpi_status_t hpi_pfc_set_tx_int_stat_mask(hpi_handle_t handle,
48 hpi_status_t hpi_vmac_rx_set_framesize(hpi_handle_t handle,
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| H A D | hpi_pfc.c | 35 hpi_pfc_tcam_check_completion(hpi_handle_t handle, tcam_op_t op_type) in hpi_pfc_tcam_check_completion()
87 hpi_pfc_tcam_entry_read(hpi_handle_t handle, uint32_t location, in hpi_pfc_tcam_entry_read()
117 hpi_pfc_tcam_asc_ram_entry_read(hpi_handle_t handle, in hpi_pfc_tcam_asc_ram_entry_read()
143 hpi_pfc_tcam_asc_ram_entry_write(hpi_handle_t handle, uint32_t location, in hpi_pfc_tcam_asc_ram_entry_write()
171 hpi_pfc_set_config(hpi_handle_t handle, pfc_config_t config) in hpi_pfc_set_config()
182 hpi_pfc_get_config(hpi_handle_t handle, pfc_config_t *configp) in hpi_pfc_get_config()
193 hpi_pfc_set_tcam_enable(hpi_handle_t handle, boolean_t tcam) in hpi_pfc_set_tcam_enable()
211 hpi_pfc_set_l2_hash(hpi_handle_t handle, boolean_t l2_hash) in hpi_pfc_set_l2_hash()
229 hpi_pfc_set_tcp_cksum(hpi_handle_t handle, boolean_t cksum) in hpi_pfc_set_tcp_cksum()
247 hpi_pfc_set_default_dma(hpi_handle_t handle, uint32_t dma_channel_no) in hpi_pfc_set_default_dma()
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| H A D | hpi_rxdma.h | 166 hpi_status_t hpi_rxdma_cfg_rdc_wait_for_qst(hpi_handle_t handle, uint8_t rdc);
167 hpi_status_t hpi_rxdma_cfg_rdc_ring(hpi_handle_t handle, uint8_t rdc,
169 hpi_status_t hpi_rxdma_cfg_clock_div_set(hpi_handle_t handle, uint16_t count);
170 hpi_status_t hpi_rxdma_cfg_logical_page_handle(hpi_handle_t handle, uint8_t rdc,
173 hpi_status_t hpi_rxdma_rdc_rbr_stat_get(hpi_handle_t handle, uint8_t rdc,
175 hpi_status_t hpi_rxdma_cfg_rdc_reset(hpi_handle_t handle, uint8_t rdc);
176 hpi_status_t hpi_rxdma_cfg_rdc_enable(hpi_handle_t handle, uint8_t rdc);
177 hpi_status_t hpi_rxdma_cfg_rdc_disable(hpi_handle_t handle, uint8_t rdc);
178 hpi_status_t hpi_rxdma_cfg_rdc_rcr_timeout(hpi_handle_t handle, uint8_t rdc,
181 hpi_status_t hpi_rxdma_cfg_rdc_rcr_threshold(hpi_handle_t handle, uint8_t rdc,
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| H A D | hpi_vir.h | 93 hpi_status_t hpi_fzc_ldg_num_set(hpi_handle_t handle, uint8_t ld, uint8_t ldg);
94 hpi_status_t hpi_ldsv_ldfs_get(hpi_handle_t handle, uint8_t ldg,
96 hpi_status_t hpi_ldsv_get(hpi_handle_t handle, uint8_t ldg, ldsv_type_t vector,
98 hpi_status_t hpi_intr_mask_set(hpi_handle_t handle, uint8_t ld,
100 hpi_status_t hpi_intr_ldg_mgmt_set(hpi_handle_t handle, uint8_t ldg,
102 hpi_status_t hpi_fzc_ldg_timer_res_set(hpi_handle_t handle, uint32_t res);
103 hpi_status_t hpi_fzc_sid_set(hpi_handle_t handle, fzc_sid_t sid);
104 hpi_status_t hpi_fzc_sys_err_mask_set(hpi_handle_t handle, boolean_t mask);
105 hpi_status_t hpi_fzc_sys_err_stat_get(hpi_handle_t handle,
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| H A D | hpi_txdma.c | 34 static hpi_status_t hpi_txdma_control_reset_wait(hpi_handle_t handle,
38 hpi_txdma_log_page_handle_set(hpi_handle_t handle, uint8_t channel, in hpi_txdma_log_page_handle_set()
56 hpi_txdma_channel_reset(hpi_handle_t handle, uint8_t channel) in hpi_txdma_channel_reset()
64 hpi_txdma_channel_init_enable(hpi_handle_t handle, uint8_t channel) in hpi_txdma_channel_init_enable()
70 hpi_txdma_channel_enable(hpi_handle_t handle, uint8_t channel) in hpi_txdma_channel_enable()
76 hpi_txdma_channel_disable(hpi_handle_t handle, uint8_t channel) in hpi_txdma_channel_disable()
82 hpi_txdma_channel_mbox_enable(hpi_handle_t handle, uint8_t channel) in hpi_txdma_channel_mbox_enable()
88 hpi_txdma_channel_control(hpi_handle_t handle, txdma_cs_cntl_t control, in hpi_txdma_channel_control()
167 hpi_txdma_control_status(hpi_handle_t handle, io_op_t op_mode, uint8_t channel, in hpi_txdma_control_status()
205 hpi_txdma_event_mask(hpi_handle_t handle, io_op_t op_mode, uint8_t channel, in hpi_txdma_event_mask()
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| H A D | hpi_vir.c | 36 hpi_fzc_ldg_num_set(hpi_handle_t handle, uint8_t ld, uint8_t ldg) in hpi_fzc_ldg_num_set()
64 hpi_ldsv_ldfs_get(hpi_handle_t handle, uint8_t ldg, uint32_t *vector0_p, in hpi_ldsv_ldfs_get()
83 hpi_ldsv_get(hpi_handle_t handle, uint8_t ldg, ldsv_type_t vector, in hpi_ldsv_get()
118 hpi_intr_mask_set(hpi_handle_t handle, uint8_t ld, uint8_t ldf_mask) in hpi_intr_mask_set()
144 hpi_intr_ldg_mgmt_set(hpi_handle_t handle, uint8_t ldg, boolean_t arm, in hpi_intr_ldg_mgmt_set()
183 hpi_fzc_ldg_timer_res_set(hpi_handle_t handle, uint32_t res) in hpi_fzc_ldg_timer_res_set()
206 hpi_fzc_sid_set(hpi_handle_t handle, fzc_sid_t sid) in hpi_fzc_sid_set()
235 hpi_fzc_sys_err_mask_set(hpi_handle_t handle, boolean_t mask) in hpi_fzc_sys_err_mask_set()
257 hpi_fzc_sys_err_stat_get(hpi_handle_t handle, dev_err_stat_t *statp) in hpi_fzc_sys_err_stat_get()
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| H A D | hpi_rxdma.c | 42 hpi_rxdma_cfg_logical_page_handle(hpi_handle_t handle, uint8_t rdc, in hpi_rxdma_cfg_logical_page_handle()
63 hpi_rxdma_cfg_rdc_wait_for_qst(hpi_handle_t handle, uint8_t rdc) in hpi_rxdma_cfg_rdc_wait_for_qst()
84 hpi_rxdma_cfg_rdc_ctl(hpi_handle_t handle, uint8_t rdc, uint8_t op) in hpi_rxdma_cfg_rdc_ctl()
158 hpi_rxdma_cfg_rdc_enable(hpi_handle_t handle, uint8_t rdc) in hpi_rxdma_cfg_rdc_enable()
164 hpi_rxdma_cfg_rdc_disable(hpi_handle_t handle, uint8_t rdc) in hpi_rxdma_cfg_rdc_disable()
170 hpi_rxdma_cfg_rdc_reset(hpi_handle_t handle, uint8_t rdc) in hpi_rxdma_cfg_rdc_reset()
176 hpi_rxdma_cfg_rdc_rcr_ctl(hpi_handle_t handle, uint8_t rdc, in hpi_rxdma_cfg_rdc_rcr_ctl()
214 hpi_rxdma_cfg_rdc_rcr_threshold(hpi_handle_t handle, uint8_t rdc, in hpi_rxdma_cfg_rdc_rcr_threshold()
222 hpi_rxdma_cfg_rdc_rcr_timeout(hpi_handle_t handle, uint8_t rdc, in hpi_rxdma_cfg_rdc_rcr_timeout()
233 hpi_rxdma_cfg_rdc_ring(hpi_handle_t handle, uint8_t rdc, in hpi_rxdma_cfg_rdc_ring()
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| H A D | hpi_vmac.c | 35 hpi_tx_vmac_reset(hpi_handle_t handle) in hpi_tx_vmac_reset()
49 hpi_rx_vmac_reset(hpi_handle_t handle) in hpi_rx_vmac_reset()
64 hpi_vmac_tx_config(hpi_handle_t handle, config_op_t op, uint64_t config, in hpi_vmac_tx_config()
129 hpi_vmac_rx_set_framesize(hpi_handle_t handle, uint16_t max_frame_length) in hpi_vmac_rx_set_framesize()
153 hpi_vmac_rx_config(hpi_handle_t handle, config_op_t op, uint64_t config, in hpi_vmac_rx_config()
246 hpi_vmac_clear_rx_int_stat(hpi_handle_t handle) in hpi_vmac_clear_rx_int_stat()
257 hpi_vmac_clear_tx_int_stat(hpi_handle_t handle) in hpi_vmac_clear_tx_int_stat()
268 hpi_pfc_set_rx_int_stat_mask(hpi_handle_t handle, boolean_t overflow_cnt, in hpi_pfc_set_rx_int_stat_mask()
287 hpi_pfc_set_tx_int_stat_mask(hpi_handle_t handle, boolean_t overflow_cnt, in hpi_pfc_set_tx_int_stat_mask()
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| H A D | hxge_vmac.c | 113 hpi_handle_t handle = hxgep->hpi_handle; in hxge_tx_vmac_init()
133 hpi_handle_t handle = hxgep->hpi_handle; in hxge_rx_vmac_init()
168 hpi_handle_t handle = hxgep->hpi_handle; in hxge_tx_vmac_enable()
195 hpi_handle_t handle = hxgep->hpi_handle; in hxge_tx_vmac_disable()
215 hpi_handle_t handle = hxgep->hpi_handle; in hxge_rx_vmac_enable()
255 hpi_handle_t handle = hxgep->hpi_handle; in hxge_rx_vmac_disable()
286 hpi_handle_t handle = hxgep->hpi_handle; in hxge_tx_vmac_reset()
298 hpi_handle_t handle = hxgep->hpi_handle; in hxge_rx_vmac_reset()
318 hpi_handle_t handle; in hxge_vmac_intr()
373 hpi_handle_t handle; in hxge_save_cntrs()
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| H A D | hxge_fzc.c | 70 hpi_handle_t handle; in hxge_fzc_intr_ldg_num_set()
116 hpi_handle_t handle; in hxge_fzc_intr_tmres_set()
136 hpi_handle_t handle; in hxge_fzc_intr_sid_set()
197 hpi_handle_t handle; in hxge_init_fzc_rxdma_channel_pages()
235 hpi_handle_t handle; in hxge_init_fzc_rx_common()
265 hpi_handle_t handle; in hxge_init_fzc_txdma_channel_pages()
287 hpi_handle_t handle; in hxge_fzc_sys_err_mask_set()
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| H A D | hxge_pfc.c | 73 hpi_handle_t handle; in hxge_tcam_dump_entry()
170 hpi_handle_t handle; in hxge_tcam_default_add_entry()
464 hpi_handle_t handle; in hxge_pfc_set_mac_address()
513 hpi_handle_t handle; in hxge_pfc_set_hash()
537 hpi_handle_t handle; in hxge_pfc_config_tcam_enable()
561 hpi_handle_t handle; in hxge_pfc_config_tcam_disable()
588 hpi_handle_t handle; in hxge_cfg_tcam_ip_class_get()
647 hpi_handle_t handle; in hxge_pfc_config_init()
686 hpi_handle_t handle; in hxge_pfc_tcam_invalidate_all()
713 hpi_handle_t handle; in hxge_pfc_tcam_init()
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| H A D | hpi.h | 159 } hpi_handle_t; typedef
162 void hpi_rtrace_update(hpi_handle_t handle, boolean_t wr, rtrace_t *rt,
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| H A D | hxge.h | 298 hpi_handle_t hpi_handle;
299 hpi_handle_t hpi_pci_handle;
300 hpi_handle_t hpi_reg_handle;
301 hpi_handle_t hpi_msi_handle;
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| H A D | hxge_txdma.c | 156 hpi_handle_t handle; in hxge_reset_txdma_channel()
186 hpi_handle_t handle; in hxge_init_txdma_channel_event_mask()
215 hpi_handle_t handle; in hxge_enable_txdma_channel()
613 hpi_handle_t handle; in hxge_txdma_reclaim()
811 hpi_handle_t handle; in hxge_tx_intr()
915 hpi_handle_t handle; in hxge_txdma_hw_mode()
988 hpi_handle_t handle; in hxge_txdma_enable_channel()
1003 hpi_handle_t handle; in hxge_txdma_disable_channel()
1018 hpi_handle_t handle; in hxge_txdma_stop_inj_err()
1301 hpi_handle_t handle; in hxge_txdma_channel_hung()
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| H A D | hpi.c | 85 hpi_rtrace_update(hpi_handle_t handle, boolean_t wr, rtrace_t *rt, in hpi_rtrace_update()
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| H A D | hxge_rxdma.c | 163 hpi_handle_t handle; in hxge_init_rxdma_channel_cntl_stat()
185 hpi_handle_t handle; in hxge_enable_rxdma_channel()
285 hpi_handle_t handle; in hxge_disable_rxdma_channel()
306 hpi_handle_t handle; in hxge_rxdma_channel_rcrflush()
776 hpi_handle_t handle; in hxge_rxdma_hw_mode()
1094 hpi_handle_t handle; in hxge_rx_intr()
1280 hpi_handle_t handle; in hxge_disable_poll()
1340 hpi_handle_t handle; in hxge_rx_poll()
1398 hpi_handle_t handle; in hxge_rx_pkts()
2085 hpi_handle_t handle; in hxge_rx_rbr_empty_recover()
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| H A D | hxge_hw.c | 115 hpi_handle_t handle; in hxge_intr()
227 hpi_handle_t handle; in hxge_peu_handle_sys_errors()
344 hpi_handle_t handle; in hxge_syserr_intr()
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| H A D | hxge_send.c | 92 hpi_handle_t hpi_desc_handle; in hxge_start()
119 hpi_handle_t hpi_handle; in hxge_start()
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| H A D | hxge_virtual.c | 727 hpi_handle_t handle; in hxge_intr_mask_mgmt()
804 hpi_handle_t handle; in hxge_intr_mask_mgmt_set()
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| H A D | hxge_impl.h | 198 hpi_handle_t hpi_handle;
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| H A D | hxge_ndd.c | 738 hpi_handle_t handle; in hxge_param_set_vlan_ids()
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| H A D | hxge_main.c | 4420 hpi_handle_t handle; in hxge_link_poll()
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