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Searched refs:gsr (Results 1 – 24 of 24) sorted by relevance

/titanic_44/usr/src/uts/sparc/v9/sys/
H A Dvis_simulator.h148 #define GSR_ALIGN(gsr) ((gsr & GSR_ALIGN_MASK) >> GSR_ALIGN_SHIFT) argument
149 #define GSR_SCALE(gsr) ((gsr & GSR_SCALE_MASK) >> GSR_SCALE_SHIFT) argument
150 #define GSR_IRND(gsr) ((gsr & GSR_IRND_MASK) >> GSR_IRND_SHIFT) argument
151 #define GSR_IM(gsr) ((gsr & GSR_IM_MASK) >> GSR_IM_SHIFT) argument
152 #define GSR_MASK(gsr) ((gsr & GSR_MASK_MASK) >> GSR_MASK_SHIFT) argument
/titanic_44/usr/src/lib/libm/common/m9x/
H A D__fex_hdlr.c235 unsigned int gsr; in __fex_hdlr() local
291 gsr = uap->uc_mcontext.asrs[3]; in __fex_hdlr()
293 gsr = 0; in __fex_hdlr()
295 gsr = (*(unsigned long long*)((prxregset_t*)uap->uc_mcontext. in __fex_hdlr()
298 gsr = (gsr >> 25) & 7; in __fex_hdlr()
299 if (gsr & 4) { in __fex_hdlr()
303 fsr = (fsr & ~0xc0400000ul) | ((gsr & 3) << 30); in __fex_hdlr()
323 if (gsr & 4) { in __fex_hdlr()
325 siamp = (void (*)()) siam[1 + (gsr & 3)]; in __fex_hdlr()
332 if (gsr & 4) { in __fex_hdlr()
/titanic_44/usr/src/uts/i86xpv/cpu/generic_cpu/
H A Dgcpu_mca_xpv.c148 cmi_mca_regs_t gsr; in gcpu_xpv_proxy_logout() local
151 gsr.cmr_msrnum = IA32_MSR_MCG_STATUS; in gcpu_xpv_proxy_logout()
152 gsr.cmr_msrval = mgi->mc_gstatus; in gcpu_xpv_proxy_logout()
153 cmi_hdl_msrforward(hdl, &gsr, 1); in gcpu_xpv_proxy_logout()
/titanic_44/usr/src/uts/sparc/v9/fpu/
H A Dfpu.c323 uint64_t gsr = get_gsr(fp); in fp_runq() local
335 (fsr_type *)&fp->fpu_fsr, gsr, in fp_runq()
424 uint64_t gsr; in fp_precise() local
428 gsr = get_gsr(fp); in fp_precise()
481 (fsr_type *)&fp->fpu_fsr, gsr, kluge.i); in fp_precise()
/titanic_44/usr/src/uts/sun4/os/
H A Dmachdep.c243 uint64_t gsr; in lwp_forkregs() local
244 gsr = get_gsr(lwp->lwp_fpu); in lwp_forkregs()
245 set_gsr(gsr, clwp->lwp_fpu); in lwp_forkregs()
302 uint64_t gsr; in xregs_getfpfiller() local
317 gsr = get_gsr(fp); in xregs_getfpfiller()
319 PRXREG_GSR(xregs) = gsr; in xregs_getfpfiller()
343 uint64_t gsr = PRXREG_GSR(xregs); in xregs_setfpfiller() local
346 set_gsr(gsr, lwptofpu(lwp)); in xregs_setfpfiller()
/titanic_44/usr/src/uts/sparc/fpu/
H A Dfpu_simulator.c172 uint64_t gsr) /* Image of GSR to read */ in _fp_fpu_simulator() argument
191 pfpsd->fp_direction = GSR_IM(gsr) ? GSR_IRND(gsr) : fsr.rnd; in _fp_fpu_simulator()
540 uint64_t gsr, /* Image of GSR to read */ in fpu_vis_sim() argument
577 ftt = _fp_fpu_simulator(pfpsd, fp.inst, pfsr, gsr); in fpu_vis_sim()
599 uint64_t gsr, /* Image of GSR to read */ in fpu_simulator() argument
615 return (_fp_fpu_simulator(pfpsd, fp.inst, pfsr, gsr)); in fpu_simulator()
636 uint64_t gsr = get_gsr(pfpu); in fp_emulator() local
656 ftt = _fp_fpu_simulator(pfpsd, fp.inst, (fsr_type *)&tfsr, gsr); in fp_emulator()
696 ftt = _fp_fpu_simulator(pfpsd, fp.inst, (fsr_type *)&tfsr, gsr); in fp_emulator()
/titanic_44/usr/src/uts/sun4/ml/
H A Dsubr_asm.s320 rd %gsr, %g2 ! save gsr
338 wr %g2, %g0, %gsr
362 rd %gsr, %o0
406 mov %o0, %gsr
H A Dswtch.s119 rd %gsr, %g5
363 wr %g0, %g0, %gsr
/titanic_44/usr/src/uts/common/io/audio/drv/audio810/
H A Daudio810.c696 uint32_t gsr; in audio810_attach() local
868 gsr = I810_BM_GET32(I810_REG_GSR); in audio810_attach()
869 if (gsr & I810_GSR_CAP6CH) { in audio810_attach()
871 } else if (gsr & I810_GSR_CAP4CH) { in audio810_attach()
1403 uint32_t gsr; in audio810_chip_init() local
1456 gsr = I810_BM_GET32(I810_REG_GSR); in audio810_chip_init()
1457 if ((gsr & codec_ready) != 0) { in audio810_chip_init()
/titanic_44/usr/src/uts/sparc/sys/fpu/
H A Dfpu_simulator.h396 struct regs *pregs, fsr_type *pfsr, uint64_t gsr, uint32_t inst);
402 fsr_type *pfsr, uint64_t gsr, uint32_t inst);
/titanic_44/usr/src/uts/sun4u/cpu/
H A Dcheetah_copy.s837 ldx [%fp + STACK_BIAS - SAVED_GSR_OFFSET], %o2 ! restore gsr
838 wr %o2, 0, %gsr
1307 rd %gsr, %o2
1308 stx %o2, [%fp + STACK_BIAS - SAVED_GSR_OFFSET] ! save gsr
1480 ldx [%fp + STACK_BIAS - SAVED_GSR_OFFSET], %o2 ! restore gsr
1481 wr %o2, 0, %gsr
1805 wr %o2, 0, %gsr ! restore gsr
2256 rd %gsr, %o2
2257 stx %o2, [%fp + STACK_BIAS - SAVED_GSR_OFFSET] ! save gsr
2427 wr %o2, 0, %gsr ! restore gsr
[all …]
H A Dopl_olympus_copy.s792 ldx [%fp + STACK_BIAS - SAVED_GSR_OFFSET], %o2 ! restore gsr
793 wr %o2, 0, %gsr
1259 rd %gsr, %o2
1260 stx %o2, [%fp + STACK_BIAS - SAVED_GSR_OFFSET] ! save gsr
1422 ldx [%fp + STACK_BIAS - SAVED_GSR_OFFSET], %o2 ! restore gsr
1423 wr %o2, 0, %gsr
1737 wr %o2, 0, %gsr ! restore gsr
2189 rd %gsr, %o2
2190 stx %o2, [%fp + STACK_BIAS - SAVED_GSR_OFFSET] ! save gsr
2350 wr %o2, 0, %gsr ! restore gsr
[all …]
H A Dspitfire_copy.s526 ld [%fp + STACK_BIAS - SAVED_GSR_OFFSET], %o2 ! restore gsr
527 wr %o2, 0, %gsr
753 rd %gsr, %o2
754 st %o2, [%fp + STACK_BIAS - SAVED_GSR_OFFSET] ! save gsr
830 alignaddr %i1, %g0, %g0 ! gen %gsr
1518 ld [%fp + STACK_BIAS - SAVED_GSR_OFFSET], %o2 ! restore gsr
1519 wr %o2, 0, %gsr
2175 wr %o2, 0, %gsr ! restore gsr
H A Dopl_olympus_asm.s843 wr %g0, %g0, %gsr ;\
/titanic_44/usr/src/uts/common/sys/nxge/
H A Dnxge_mii.h70 uchar_t gsr; /* Gigabit basic mode status register */ member
/titanic_44/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c5610 mii_gsr_t gsr; in nxge_mii_check() local
5740 (uint8_t)(uint32_t)(&mii_regs->gsr), in nxge_mii_check()
5742 (uint8_t)(uint64_t)(&mii_regs->gsr), in nxge_mii_check()
5744 &gsr.value)) != NXGE_OK) in nxge_mii_check()
5747 gsr.bits.link_1000fdx; in nxge_mii_check()
5749 gsr.bits.link_1000hdx; in nxge_mii_check()
5751 gsr.bits.link_1000fdx) { in nxge_mii_check()
5756 gsr.bits.link_1000hdx) { in nxge_mii_check()
6043 mii_gsr_t gsr; in nxge_check_mii_link() local
6090 (uint8_t)(uint32_t)(&mii_regs->gsr), in nxge_check_mii_link()
[all …]
/titanic_44/usr/src/uts/common/io/nxge/npi/
H A Dnpi_mac.c3288 mii_gsr_t gsr; in npi_mac_pcs_mii_read() local
3345 gsr.value = 0; in npi_mac_pcs_mii_read()
3346 gsr.bits.link_1000fdx = pcs_anar.bits.w0.full_duplex; in npi_mac_pcs_mii_read()
3347 gsr.bits.link_1000hdx = pcs_anar.bits.w0.half_duplex; in npi_mac_pcs_mii_read()
3348 *value = gsr.value; in npi_mac_pcs_mii_read()
/titanic_44/usr/src/uts/sun4v/cpu/
H A Dniagara_copy.s1171 rd %gsr, %l5 ! save %gsr value
2021 wr %l5, %g0, %gsr ! restore %gsr
2946 wr %l5, 0, %gsr ! restore gsr
3539 rd %gsr, %l5 ! save %gsr value
4378 wr %l5, %g0, %gsr ! restore %gsr
6245 alignaddr %i0, %g0, %g0 ! generate %gsr
/titanic_44/usr/src/lib/libc/capabilities/sun4v/common/
H A Dmemcpy.s1703 alignaddr %o1, %g0, %g0 ! generate %gsr
/titanic_44/usr/src/common/crypto/sha1/sparc/sun4u/
H A Dsha1_asm.s109 rd %gsr, %o3
131 wr %o3, 0, %gsr
/titanic_44/usr/src/lib/libc/capabilities/sun4u/common/
H A Dmemcpy.s317 alignaddr %i1, %g0, %g0 ! gen %gsr
/titanic_44/usr/src/lib/libmvec/common/vis/
H A D__vlogf.S273 wr %g0,0,%gsr
H A D__vexpf.S298 wr %g0,0x60,%gsr
H A D__vpowf.S729 wr %g0,0x60,%gsr