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/titanic_44/usr/src/uts/sun4u/ml/
H A Dzulu_asm.s61 mov UIII_IRDR_1, %g3
62 ldxa [%g3]ASI_INTR_RECEIVE, %g5
64 mov UIII_IRDR_6, %g3
65 ldxa [%g3]ASI_INTR_RECEIVE, %g5
95 lduw [%g7 + ZULUVM_ST_TLBCANCEL], %g3
96 add %g3, 1, %g3
97 stuw %g3, [%g7 + ZULUVM_ST_TLBCANCEL]
116 lduw [%g1], %g3
117 add %g3, 1, %g3
118 stuw %g3, [%g1]
[all …]
H A Dmach_xc.s78 GET_TRACE_TICK(%g6, %g3)
94 TRACE_NEXT(%g4, %g6, %g3)
121 TRACE_PTR(%g3, %g4)
123 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
124 stha %g0, [%g3 + TRAP_ENT_TL]%asi
127 stha %g4, [%g3 + TRAP_ENT_TT]%asi
128 stna %o7, [%g3 + TRAP_ENT_TPC]%asi
130 stna %g2, [%g3 + TRAP_ENT_SP]%asi /* sp = cpuset */
131 stna %o2, [%g3 + TRAP_ENT_TR]%asi /* tr = func */
132 stna %o3, [%g3 + TRAP_ENT_F1]%asi /* f1 = arg1 */
[all …]
H A Dtrap_table.s126 rdpr %tt, %g3 ;\
158 mov arg, %g3 ;\
200 mov T_FLUSHW, %g3 ;\
238 rdpr %tt, %g3 ;\
343 mov 12, %g3 ;\
344 sta %l3, [%sp + %g3]asi_num ;\
349 sta %l7, [%g4 + %g3]asi_num ;\
354 sta %i3, [%g4 + %g3]asi_num ;\
359 sta %i7, [%g4 + %g3]asi_num ;\
447 mov 12, %g3 ;\
[all …]
H A Dmach_interrupt.s92 srlx %g1, CTXREG_NEXT_SHIFT, %g3
93 brz,pt %g3, 7f ! nucleus pgsz is 0, no problem
94 sllx %g3, CTXREG_NEXT_SHIFT, %g3
98 clr %g3 ! kernel: PCONTEXT=0
99 xor %g3, %g1, %g3 ! user: clr N_pgsz0/1 bits
105 stxa %g3, [%g1]ASI_DMMU
122 ! g3: arg3
131 GET_TRACE_TICK(%g6, %g3)
147 TRACE_NEXT(%g4, %g6, %g3)
293 GET_TRACE_TICK(%g6, %g3)
[all …]
/titanic_44/usr/src/uts/sun4v/ml/
H A Dmach_xc.s80 GET_TRACE_TICK(%g6, %g3)
96 TRACE_NEXT(%g4, %g6, %g3)
123 TRACE_PTR(%g3, %g4)
125 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
126 stha %g0, [%g3 + TRAP_ENT_TL]%asi
129 stha %g4, [%g3 + TRAP_ENT_TT]%asi
130 stna %o7, [%g3 + TRAP_ENT_TPC]%asi
132 stna %g2, [%g3 + TRAP_ENT_SP]%asi /* sp = cpuset */
133 stna %o2, [%g3 + TRAP_ENT_TR]%asi /* tr = func */
134 stna %o3, [%g3 + TRAP_ENT_F1]%asi /* f1 = arg1 */
[all …]
H A Dtrap_table.s127 rdpr %tt, %g3 ;\
163 mov arg, %g3 ;\
231 rdpr %tt, %g3 ;\
336 mov 12, %g3 ;\
337 sta %l3, [%sp + %g3]asi_num ;\
342 sta %l7, [%g4 + %g3]asi_num ;\
347 sta %i3, [%g4 + %g3]asi_num ;\
352 sta %i7, [%g4 + %g3]asi_num ;\
411 mov 12, %g3 ;\
413 lda [%sp + %g3]asi_num, %l3 ;\
[all …]
H A Dmach_interrupt.s69 ! %g3 queue base VA
73 mov CPU_MONDO_Q_HD, %g3
74 ldxa [%g3]ASI_QUEUE, %g6 ! %g6 = head ptr
83 ldx [%g2 + MCPU_CPU_Q_BASE], %g3 ! %g3 = queue base PA
448 * head offset(arg2) and %g3 is tail
465 stxa %g3, [%g4]ASI_QUEUE ! set head equal to tail
507 ldxa [%g4]ASI_QUEUE, %g3 ! %g3 = Q tail offset
509 cmp %g2, %g3
518 ldxa [%g4]ASI_QUEUE, %g3 ! %g3 = Q tail offset
565 cmp %g6, %g3 ! head == tail ??
[all …]
/titanic_44/usr/src/uts/sun4/brand/common/
H A Dbrand_solaris.s95 rdpr %tstate, %g3; /* %tstate.am is the trapping */
96 andcc %g3, TSTATE_AM, %g3; /* threads address mask bit */
113 rdpr %tstate, %g3; /* %tstate.am is the trapping */
114 andcc %g3, TSTATE_AM, %g3; /* threads address mask bit */
222 set XXX_emulation_table, %g3;
223 ldn [%g3], %g3;
224 add %g3, %l1, %g3;
225 ldub [%g3], %g3;
226 brz %g3, _exit;
237 ldn [%g2 + CPU_THREAD], %g3; /* get thread ptr */
[all …]
/titanic_44/usr/src/common/crypto/arcfour/sun4u/
H A Darcfour_crypt_asm.s38 .register %g3,#scratch
80 ldub [%i5 + %g1], %g3
84 add %o2, %g3, %g2
104 stb %g3, [%i5 + %g2]
105 add %g3, %g4, %g5
116 ldub [%i5 + %g1], %g3
121 add %o2, %g3, %g2
143 stb %g3, [%i5 + %g2]
144 add %g3, %g4, %g5
155 ldub [%i5 + %g1], %g3
[all …]
/titanic_44/usr/src/uts/sun4u/cpu/
H A Dus3_cheetahplus_asm.s192 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
198 cmp %g3, CLO_NESTING_MAX
216 PN_L2_FLUSHALL(%g3, %g4, %g5)
227 mov %g6, %g3
228 CHP_ECACHE_FLUSHALL(%g4, %g5, %g3)
239 ldxa [%g1 + CH_ERR_TL1_TMP]%asi, %g3
240 andcc %g3, CH_ERR_TSTATE_DC_ON, %g0
254 ldxa [%g0]ASI_DCU, %g3
255 or %g3, DCU_DC, %g3
256 stxa %g3, [%g0]ASI_DCU
[all …]
H A Dus3_cheetah_asm.s121 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
127 cmp %g3, CLO_NESTING_MAX
167 ldxa [%g1 + CH_ERR_TL1_TMP]%asi, %g3
168 andcc %g3, CH_ERR_TSTATE_DC_ON, %g0
182 ldxa [%g0]ASI_DCU, %g3
183 or %g3, DCU_DC, %g3
184 stxa %g3, [%g0]ASI_DCU
190 ldxa [%g1 + CH_ERR_TL1_TMP]%asi, %g3
191 andcc %g3, CH_ERR_TSTATE_IC_ON, %g0
200 CH_ICACHE_FLUSHALL(%g4, %g5, %g6, %g3)
[all …]
H A Dus3_jalapeno_asm.s371 JP_FORCE_FULL_SPEED(%o3, %g1, %g2, %g3); /* %o3: saved speed */
382 JP_RESTORE_SPEED(%o3, %g1, %g2, %g3); /* %o3: saved speed */
408 ldxa [%g0]ASI_ESTATE_ERR, %g3
409 andn %g3, EN_REG_NCEEN + EN_REG_CEEN, %g4
426 and %g3, EN_REG_CEEN, %g4 ! store the CEEN value, TL=0
428 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
445 stx %g3, [%g6 + 8]
446 JP_FORCE_FULL_SPEED(%g2, %g3, %g6, %g7) /* %g2: saved speed */
452 JP_RESTORE_SPEED(%g2, %g3, %g6, %g7) /* %g2: saved speed */
455 ldx [%g6 + 8], %g3
[all …]
H A Dopl_olympus_asm.s195 sethi %hi(ksfmmup), %g3
196 ldx [%g3 + %lo(ksfmmup)], %g3
197 cmp %g3, %g2
210 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
256 and %g4, %g2, %g3 /* g3 = pgcnt - 1 */
257 add %g3, 1, %g3 /* g3 = pgcnt */
277 deccc %g3 /* decr pgcnt */
310 deccc %g3 /* decr pgcnt */
490 mov IDDR_2, %g3
501 stxa %o2, [%g3]ASI_INTR_DISPATCH
[all …]
H A Dus3_common_asm.s302 sethi %hi(ksfmmup), %g3
303 ldx [%g3 + %lo(ksfmmup)], %g3
304 cmp %g3, %g2
317 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
363 and %g4, %g2, %g3 /* g3 = pgcnt - 1 */
364 add %g3, 1, %g3 /* g3 = pgcnt */
384 deccc %g3 /* decr pgcnt */
417 deccc %g3 /* decr pgcnt */
500 DCACHE_FLUSHPAGE(%g1, %g2, %g3, %g4, %g5)
544 DCACHE_FLUSHCOLOR(%g1, 0, %g2, %g3, %g4)
[all …]
/titanic_44/usr/src/common/bignum/sun4u/
H A Dmont_mulf_v9.s76 /* 000000 0 */ .register %g3,#scratch
132 /* 000000 57 */ or %g0,%o7,%g3
140 /* 0x001c */ or %g0,%g3,%o7
250 /* 0x0038 77 */ or %g0,-1,%g3
251 /* 0x003c */ srl %g3,0,%l4
282 /* 0x0088 91 */ and %o0,%l3,%g3
294 /* 0x00b8 91 */ sllx %g3,16,%g5
295 /* 0x00bc 87 */ or %g0,48,%g3
302 /* 0x00d8 */ ldd [%i1+%g3],%f0
305 /* 0x00e4 89 */ srax %o1,32,%g3
[all …]
H A Dmont_mulf_v8plus.s176 /* 0x0034 */ add %o2,1,%g3
186 /* 0x005c 74 */ cmp %g3,3
208 /* 0x0078 */ sllx %o0,16,%g3
210 /* 0x0080 74 */ add %o0,%g3,%o4
225 /* 0x00bc 76 */ ldx [%sp+104],%g3
229 /* 0x00cc 84 */ or %g0,%g3,%g4
241 /* 0x00f8 80 */ and %g1,%o1,%g3
242 /* 0x00fc */ sllx %g3,16,%g5
243 /* 0x0100 77 */ and %g4,%o3,%g3
244 /* 0x0104 74 */ add %g3,%g5,%g3
[all …]
/titanic_44/usr/src/uts/sfmmu/ml/
H A Dsfmmu_asm.s716 ldstub [%o0 + SFMMU_CTX_LOCK], %g3 ! %g3 = per process (PP) lock
718 brz %g3, 5f
721 brnz,a,pt %g3, 4b ! spin if lock is 1
722 ldub [%o0 + SFMMU_CTX_LOCK], %g3
724 ldstub [%o0 + SFMMU_CTX_LOCK], %g3 ! %g3 = PP lock
769 add %o3, MMU_CTX_CNUM, %g3
783 ld [%g3], %o1
799 ! %g3 = addr of mmu_ctxp->cnum
801 cas [%g3], %o1, %o5
804 ld [%g3], %o1
[all …]
H A Dsfmmu_kdi.s116 cmp %g3, TTE8K; \
119 mulx %g3, 3, %g5; \
129 sllx %g3, HTAG_REHASH_SHIFT, %g6; \
210 add %g4, HMEBLK_MISC, %g3; \
211 lda [%g3]ASI_MEM, %g3; \
212 and %g3, HBLK_SZMASK, %g3; /* ttesz in %g3 */ \
214 cmp %g3, TTE8K; \
281 set kdi_trap_vatotte, %g3
282 jmpl %g3, %g7 /* => %g1: TTE or 0 */
312 mov 1, %g3 /* VA %g1, ksfmmup %g2, idx %g3 */
[all …]
/titanic_44/usr/src/cmd/mdb/sparc/v9/kmdb/
H A Dkaif_startup.s156 stx %g3, [%o5 + KREG_OFF(KREG_G3)]
253 ldx [%g6 + KRS_RWINS], %g3
254 1: SAVE_V9WINDOW(%g3)
256 add %g3, RWIN_SIZE, %g3
435 ADD_CRUMB_FLAG(%g6, KAIF_CRUMB_F_MAIN_NORMAL, %g1, %g2, %g3)
438 mov MMU_PCONTEXT, %g3
439 ldxa [%g3]ASI_MMU_CTX, %g2 ! ASI_MMU_CTX == ASI_DMMU for sun4u
459 stxa %g2, [%g3]ASI_MMU_CTX
469 stxa %g0, [%g3]ASI_MMU_CTX ! ASI_MMU_CTX == ASI_DMMU for sun4u
480 ADD_CRUMB_FLAG(%g6, KAIF_CRUMB_F_MAIN_OBPWAPT, %g1, %g2, %g3)
[all …]
H A Dkaif_resume.s105 ldx [%g6 + KRS_RWINS], %g3 ! %g3 = &cpusave[this_cpuid].krs_wins
108 RESTORE_V9WINDOW(%g3)
110 add %g3, RWIN_SIZE, %g3
141 mov MMU_PCONTEXT, %g3
144 stxa %g4, [%g3]ASI_MMU_CTX
170 ldx [%g5 + KREG_OFF(KREG_G3)], %g3
/titanic_44/usr/src/uts/sun4u/vm/
H A Dmach_sfmmu_asm.s123 sethi %hi(ksfmmup), %g3
124 ldx [%g3 + %lo(ksfmmup)], %g3
125 cmp %g1, %g3
132 mov MMU_SCONTEXT, %g3
150 ldxa [%g3]ASI_MMU_CTX, %g5 /* %g5 = pgsz | sec-ctx */
157 stxa %g2, [%g3]ASI_MMU_CTX /* set invalid ctx */
161 ldxa [%g7]ASI_MMU_CTX, %g3 /* get pgz | pri-ctx */
162 and %g3, %g4, %g5 /* %g5 = pri-ctx */
165 srlx %g3, CTXREG_NEXT_SHIFT, %g3 /* %g3 = nucleus pgsz */
166 sllx %g3, CTXREG_NEXT_SHIFT, %g3 /* need to preserve nucleus pgsz */
[all …]
/titanic_44/usr/src/common/crypto/des/sun4u/
H A Ddes_crypt_asm.s87 .register %g3,#scratch
2286 sethi %hi(0xaaaaaaaa), %g3
2293 or %g3, %lo(0xaaaaaaaa), %g3
2295 sllx %g3, 32, %o0
2297 or %g3, %o0, %g3 ! 0xaaaaaaaaaaaaaaaa
2299 srlx %g3, 1, %g2 ! 0x5555555555555555
2300 and %i1, %g3, %g1
2302 sllx %g1, 7, %g3
2308 or %g1, %g3, %g1
2355 ldx [%i5 + 96], %g3 ! top_1
[all …]
/titanic_44/usr/src/uts/sparc/dtrace/
H A Ddtrace_asm.s209 sub %g1, %o0, %g3
210 brgez,a,pt %g3, 0f
211 wrpr %g3, %cwp
217 add %g4, %g3, %g3
218 inc %g3
219 wrpr %g3, %cwp
336 lduh [%o3], %g3
337 andcc %g3, CPU_DTRACE_BADADDR, %g0
375 lduh [%o3], %g3
376 andcc %g3, CPU_DTRACE_BADADDR, %g0
[all …]
/titanic_44/usr/src/uts/sparc/v9/ml/
H A Dsyscall_trap.s165 set sysent, %g3 ! load address of vector table
170 add %g3, %g4, %l4
171 ldn [%l4 + SY_CALLC], %g3 ! load system call handler
173 call %g3 ! call system call handler
195 GET_TRACE_TICK(%g2, %g3)
212 TRACE_NEXT(%g4, %g2, %g3) ! set new trace pointer
236 mov CCR_IC, %g3
237 sllx %g3, TSTATE_CCR_SHIFT, %g3
239 andn %g1, %g3, %g1 ! clear carry bit for no error
408 set sysent32, %g3 ! load address of vector table
[all …]
/titanic_44/usr/src/uts/sun4v/vm/
H A Dmach_sfmmu_asm.s113 sethi %hi(ksfmmup), %g3
114 ldx [%g3 + %lo(ksfmmup)], %g3
115 cmp %g1, %g3
123 mov MMU_SCONTEXT, %g3
125 ldxa [%g3]ASI_MMU_CTX, %g5 /* %g5 = sec-ctx */
130 stxa %g2, [%g3]ASI_MMU_CTX /* set invalid ctx */
143 mov %o0, %g3
158 mov %g3, %o0
178 ldxa [%g3]ASI_MMU_CTX, %g5 /* %g5 = sec-ctx */
183 stxa %g2, [%g3]ASI_MMU_CTX /* set sec-ctx to invalid */
[all …]

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