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Searched refs:fpu_regs (Results 1 – 15 of 15) sorted by relevance

/titanic_44/usr/src/uts/intel/ia32/os/
H A Dfpu.c199 cfp->fpu_regs.kfpu_status = 0; in fp_new_lwp()
200 cfp->fpu_regs.kfpu_xstatus = 0; in fp_new_lwp()
205 fn = &fp->fpu_regs.kfpu_u.kfpu_fn; in fp_new_lwp()
206 cfn = &cfp->fpu_regs.kfpu_u.kfpu_fn; in fp_new_lwp()
212 fx = &fp->fpu_regs.kfpu_u.kfpu_fx; in fp_new_lwp()
213 cfx = &cfp->fpu_regs.kfpu_u.kfpu_fx; in fp_new_lwp()
222 fx = &fp->fpu_regs.kfpu_u.kfpu_xs.xs_fxsave; in fp_new_lwp()
223 cxs = &cfp->fpu_regs.kfpu_u.kfpu_xs; in fp_new_lwp()
308 fpsave(&fp->fpu_regs.kfpu_u.kfpu_fn); in fp_save()
312 fpxsave(&fp->fpu_regs.kfpu_u.kfpu_fx); in fp_save()
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H A Darchdep.c298 bcopy(fp, &fpu->fpu_regs.kfpu_u.kfpu_fn, in setfpregs()
299 sizeof (fpu->fpu_regs.kfpu_u.kfpu_fn)); in setfpregs()
303 fpregset_to_fxsave(fp, &fpu->fpu_regs.kfpu_u.kfpu_fx); in setfpregs()
304 fpu->fpu_regs.kfpu_xstatus = in setfpregs()
310 &fpu->fpu_regs.kfpu_u.kfpu_xs.xs_fxsave); in setfpregs()
311 fpu->fpu_regs.kfpu_xstatus = in setfpregs()
313 fpu->fpu_regs.kfpu_u.kfpu_xs.xs_xstate_bv |= in setfpregs()
321 fpu->fpu_regs.kfpu_status = fp->fp_reg_set.fpchip_state.status; in setfpregs()
362 bcopy(&fpu->fpu_regs.kfpu_u.kfpu_fn, fp, in getfpregs()
363 sizeof (fpu->fpu_regs.kfpu_u.kfpu_fn)); in getfpregs()
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/titanic_44/usr/src/uts/sparc/sys/
H A Dmcontext.h150 uint32_t fpu_regs[32]; /* 32 singles */ member
165 uint32_t fpu_regs[32]; /* 32 singles */ member
185 uint32_t fpu_regs[32]; /* 32 singles */ member
206 uint32_t fpu_regs[32]; /* 32 singles */ member
/titanic_44/usr/src/uts/sparc/v9/fpu/
H A Dfpu.c109 cfp->fpu_fr.fpu_regs[i] = pfp->fpu_fr.fpu_regs[i]; in fp_fork()
191 fp->fpu_fr.fpu_regs[i] = (uint_t)-1; /* NaN */ in fp_enable()
286 fp->fpu_fr.fpu_regs[i] = (uint_t)-1; /* NaN */ in fp_disabled()
395 _fp_read_pfreg(&fp->fpu_fr.fpu_regs[i], i); in fp_runq()
/titanic_44/usr/src/uts/i86pc/ml/
H A Dmach_offsets.in132 lwp_pcb.pcb_fpu.fpu_regs LWP_FPU_REGS
134 lwp_pcb.pcb_fpu.fpu_regs.kfpu_u.kfpu_fx LWP_FPU_CHIP_STATE
140 pcb_fpu.fpu_regs PCB_FPU_REGS
H A Doffsets.in169 fpu_regs FPU_CTX_FPU_REGS
/titanic_44/usr/src/uts/intel/sys/
H A Dpcb.h41 kfpu_t fpu_regs; /* kernel save area for FPU */ member
/titanic_44/usr/src/lib/libbc/libc/sys/common/
H A Ducontext.h72 unsigned fpu_regs[32]; /* 32 singles */ member
/titanic_44/usr/src/uts/sparc/fpu/
H A Dutility.c40 *pf = pfpsd->fp_current_pfregs->fpu_fr.fpu_regs[n]; in _fp_read_vfreg()
49 pfpsd->fp_current_pfregs->fpu_fr.fpu_regs[n] = *pf; in _fp_write_vfreg()
/titanic_44/usr/src/uts/intel/amd64/ml/
H A Dmach_offsets.in146 lwp_pcb.pcb_fpu.fpu_regs LWP_FPU_REGS
158 pcb_fpu.fpu_regs PCB_FPU_REGS
/titanic_44/usr/src/uts/sparc/v9/os/
H A Dv9dep.c296 ((uint32_t *)fp->fpu_fr.fpu_regs)[i] = (uint32_t)-1; in getfpregs()
1725 dest->fpu_fr.fpu_regs[i] = src->fpu_fr.fpu_regs[i]; in fpuregset_nto32()
1757 dest->fpu_fr.fpu_regs[i] = src->fpu_fr.fpu_regs[i]; in fpuregset_32ton()
H A Dsimulator.c302 fpu_fr.fpu_regs[rd]; in do_unaligned()
518 fp->fpu_fr.fpu_regs[rd] = in do_unaligned()
/titanic_44/usr/src/lib/libm/common/m9x/
H A D__fex_sparc.c49 #define FPreg(X) &uap->uc_mcontext.fpregs.fpu_fr.fpu_regs[X]
60 #define FPreg(X) &uap->uc_mcontext.fpregs.fpu_fr.fpu_regs[X]
/titanic_44/usr/src/uts/sun4/ml/
H A Doffsets.in296 fpu_fr.fpu_regs FPU_REGS
/titanic_44/usr/src/uts/sun4/os/
H A Dtrap.c1675 fp->fpu_fr.fpu_regs[rd] = 0; in nfload()