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Searched refs:dma_attr_align (Results 1 – 25 of 58) sorted by relevance

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/titanic_44/usr/src/uts/common/io/1394/adapters/
H A Dhci1394_buf.c59 dma_attr->dma_attr_align = 64; in hci1394_buf_attr_get()
113 dma_attr.dma_attr_align = parms->bp_alignment; in hci1394_buf_alloc()
/titanic_44/usr/src/uts/common/io/drm/
H A Ddrm_pci.c225 hw_dma_attr.dma_attr_align = 1; in drm_pci_alloc()
227 hw_dma_attr.dma_attr_align = align; in drm_pci_alloc()
/titanic_44/usr/src/uts/common/io/e1000g/
H A De1000g_alloc.c304 dma_attr.dma_attr_align = Adapter->desc_align; in e1000g_alloc_tx_descriptors()
364 dma_attr.dma_attr_align = 1; in e1000g_alloc_tx_descriptors()
499 dma_attr.dma_attr_align = Adapter->desc_align; in e1000g_alloc_rx_descriptors()
554 dma_attr.dma_attr_align = 1; in e1000g_alloc_rx_descriptors()
1255 dma_attr.dma_attr_align = Adapter->rx_buf_align; in e1000g_increase_rx_packets()
1292 dma_attr.dma_attr_align = Adapter->rx_buf_align; in e1000g_alloc_rx_packets()
/titanic_44/usr/src/uts/common/sys/
H A Dddidmareq.h427 uint64_t dma_attr_align; /* DMA address alignment */ member
/titanic_44/usr/src/uts/sun4/os/
H A Ddvma.c140 dma_attr.dma_attr_align = 1; in dvma_kaddr_load()
H A Dddi_impl.c1179 if (attr->dma_attr_minxfer == 0 || attr->dma_attr_align == 0 || in i_ddi_mem_alloc()
1180 !ISP2(attr->dma_attr_align) || !ISP2(attr->dma_attr_minxfer)) { in i_ddi_mem_alloc()
1206 iomin = maxbit(iomin, attr->dma_attr_align); in i_ddi_mem_alloc()
1213 ASSERT(iomin >= attr->dma_attr_align); in i_ddi_mem_alloc()
/titanic_44/usr/src/uts/common/io/i40e/
H A Di40e_osdep.c61 attr.dma_attr_align = alignment; in i40e_allocate_dma_mem()
/titanic_44/usr/src/uts/common/io/usb/hcd/ehci/
H A Dehci_util.c363 ehcip->ehci_dma_attr.dma_attr_align = EHCI_DMA_ATTR_ALIGNMENT; in ehci_set_dma_attributes()
406 ehcip->ehci_dma_attr.dma_attr_align = EHCI_DMA_ATTR_TD_QH_ALIGNMENT; in ehci_allocate_pools()
541 ehcip->ehci_dma_attr.dma_attr_align = EHCI_DMA_ATTR_ALIGNMENT; in ehci_allocate_pools()
547 ehcip->ehci_dma_attr.dma_attr_align = EHCI_DMA_ATTR_ALIGNMENT; in ehci_allocate_pools()
1518 ehcip->ehci_dma_attr.dma_attr_align = EHCI_DMA_ATTR_PFL_ALIGNMENT; in ehci_init_periodic_frame_lst_table()
1577 ehcip->ehci_dma_attr.dma_attr_align = EHCI_DMA_ATTR_ALIGNMENT; in ehci_init_periodic_frame_lst_table()
1582 ehcip->ehci_dma_attr.dma_attr_align = EHCI_DMA_ATTR_ALIGNMENT; in ehci_init_periodic_frame_lst_table()
H A Dehci_isoch_util.c182 ehcip->ehci_dma_attr.dma_attr_align = EHCI_DMA_ATTR_TD_QH_ALIGNMENT; in ehci_allocate_isoc_pools()
375 ehcip->ehci_dma_attr.dma_attr_align = EHCI_DMA_ATTR_ALIGNMENT; in ehci_allocate_itw()
/titanic_44/usr/src/uts/common/io/mega_sas/
H A Dmegaraid_sas.c1863 cmd->frame_dma_obj.dma_attr.dma_attr_align = 64; in create_mfi_frame_pool()
1973 instance->mfi_evt_detail_obj.dma_attr.dma_attr_align = 1; in alloc_additional_dma_buffer()
2510 dcmd_dma_obj.dma_attr.dma_attr_align = 1; in get_seq_num()
3586 pthru_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_pthru()
3711 dcmd_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_dcmd()
3854 request_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_smp()
3880 response_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_smp()
4067 fis_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_stp()
4096 data_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_stp()
/titanic_44/usr/src/uts/common/io/scsi/adapters/smrt/
H A Dsmrt_commands.c24 .dma_attr_align = 0x20,
H A Dsmrt.c38 .dma_attr_align = 0x20,
/titanic_44/usr/src/uts/common/io/mr_sas/
H A Dmr_sas_tbolt.c212 instance->mpi2_frame_pool_dma_obj.dma_attr.dma_attr_align = 256; in create_mpi2_frame_pool()
339 instance->mfi_evt_detail_obj.dma_attr.dma_attr_align = 8; in mrsas_tbolt_alloc_additional_dma_buffer()
365 instance->ld_map_obj[i].dma_attr.dma_attr_align = 1; in mrsas_tbolt_alloc_additional_dma_buffer()
461 instance->reply_desc_dma_obj.dma_attr.dma_attr_align = 16; in alloc_req_rep_desc()
523 instance->request_desc_dma_obj.dma_attr.dma_attr_align = 16; in alloc_req_rep_desc()
836 init2_dma_obj.dma_attr.dma_attr_align = 256; in mrsas_issue_init_mpi2()
1017 instance->drv_ver_dma_obj.dma_attr.dma_attr_align = 1; in mrsas_tbolt_ioc_init()
3678 dcmd_dma_obj.dma_attr.dma_attr_align = 1; in mrsas_tbolt_get_pd_info()
H A Dmr_sas.c2915 cmd->frame_dma_obj.dma_attr.dma_attr_align = 64; in create_mfi_frame_pool()
3034 instance->mfi_evt_detail_obj.dma_attr.dma_attr_align = 1; in alloc_additional_dma_buffer()
3512 instance->drv_ver_dma_obj.dma_attr.dma_attr_align = 1; in mrsas_build_init_cmd()
4001 dcmd_dma_obj.dma_attr.dma_attr_align = 1; in get_seq_num()
5429 pthru_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_pthru()
5599 dcmd_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_dcmd()
5770 request_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_smp()
5804 response_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_smp()
6020 fis_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_stp()
6056 data_dma_obj.dma_attr.dma_attr_align = 1; in issue_mfi_stp()
/titanic_44/usr/src/uts/sun4/io/px/
H A Dpx_dma.h106 (p)->dma_attr_align = (align);
H A Dpx_dma.c275 uint64_t align = attrp->dma_attr_align; in px_dma_attr2hdl()
806 MAX(mp->dmai_attr.dma_attr_align, MMU_PAGE_SIZE), in px_dvma_map()
1151 if (dev_attr_p->dma_attr_align > MMU_PAGE_SIZE) in px_dma_physwin()
/titanic_44/usr/src/uts/sun4u/sys/pci/
H A Dpci_dma.h113 (p)->dma_attr_align = (align);
/titanic_44/usr/src/uts/i86pc/io/xsvc/
H A Dxsvc.c526 mp->xm_dma_attr.dma_attr_align = P2ROUNDUP( in xsvc_ioctl_alloc_memory()
533 mp->xm_dma_attr.dma_attr_align = P2ROUNDUP( in xsvc_ioctl_alloc_memory()
/titanic_44/usr/src/uts/common/io/sfe/
H A Dsfe_util.c690 dma_attr_txbounce.dma_attr_align = in gem_alloc_memory()
691 max(dma_attr_txbounce.dma_attr_align, IOC_LINESIZE); in gem_alloc_memory()
4816 ASSERT(gc->gc_dma_attr_txbuf.dma_attr_align-1 == gc->gc_tx_buf_align); in gem_do_attach()
4817 ASSERT(gc->gc_dma_attr_rxbuf.dma_attr_align-1 == gc->gc_rx_buf_align); in gem_do_attach()
4819 gc->gc_dma_attr_rxbuf.dma_attr_align = gc->gc_rx_buf_align + 1; in gem_do_attach()
4822 gc->gc_dma_attr_desc.dma_attr_align = in gem_do_attach()
4823 max(gc->gc_dma_attr_desc.dma_attr_align, IOC_LINESIZE); in gem_do_attach()
4839 gc->gc_dma_attr_desc.dma_attr_align); in gem_do_attach()
4844 gc->gc_dma_attr_desc.dma_attr_align); in gem_do_attach()
/titanic_44/usr/src/uts/i86pc/os/
H A Dddi_impl.c1630 if (attr->dma_attr_minxfer == 0 || attr->dma_attr_align == 0 || in i_ddi_mem_alloc()
1631 !ISP2(attr->dma_attr_align) || !ISP2(attr->dma_attr_minxfer)) { in i_ddi_mem_alloc()
1639 iomin = maxbit(iomin, attr->dma_attr_align); in i_ddi_mem_alloc()
1661 npages = btopr(length + attr->dma_attr_align); in i_ddi_mem_alloc()
/titanic_44/usr/src/uts/i86pc/vm/
H A Dvm_machdep.c1126 align = maxbit(mattr->dma_attr_align, mattr->dma_attr_minxfer); in page_get_contigpage()
2548 align = maxbit(mattr->dma_attr_align, mattr->dma_attr_minxfer); in page_io_pool_alloc()
2820 align = maxbit(mattr->dma_attr_align, mattr->dma_attr_minxfer); in page_get_contigpages()
2950 align = maxbit(mattr->dma_attr_align, mattr->dma_attr_minxfer); in page_create_io()
3326 if (dma_attr->dma_attr_align > MMU_PAGESIZE) in page_get_anylist()
/titanic_44/usr/src/uts/sun4u/io/pci/
H A Dpci_dma.c432 uint64_t align = attrp->dma_attr_align; in pci_dma_attr2hdl()
1011 MAX(mp->dmai_attr.dma_attr_align, IOMMU_PAGE_SIZE), in pci_dvma_map()
1345 if (dev_attr_p->dma_attr_align > IOMMU_PAGE_SIZE) in pci_dma_physwin()
/titanic_44/usr/src/uts/common/io/scsi/adapters/pmcs/
H A Dpmcs_attach.c728 pwp->cip_dma_attr.dma_attr_align = sizeof (uint32_t); in pmcs_attach()
753 pwp->fwlog_dma_attr.dma_attr_align = 32; in pmcs_attach()
771 pwp->regdump_dma_attr.dma_attr_align = PMCS_FLASH_CHUNK_SIZE; in pmcs_attach()
1882 pwp->cip_dma_attr.dma_attr_align = sizeof (uint32_t); in pmcs_add_more_chunks()
/titanic_44/usr/src/uts/common/io/nvme/
H A Dnvme.c395 .dma_attr_align = 0x1000,
418 .dma_attr_align = 0x1000,
440 .dma_attr_align = 1,
2287 nvme->n_queue_dma_attr.dma_attr_align = nvme->n_pagesize; in nvme_init()
2296 nvme->n_prp_dma_attr.dma_attr_align = nvme->n_pagesize; in nvme_init()
/titanic_44/usr/src/uts/sun4u/io/
H A Diommu.c794 (dma_attr->dma_attr_align <= IOMMU_PAGESIZE) && addrlow == 0) { in iommu_dma_allochdl()
1048 MAX((uint_t)dma_attr->dma_attr_align, IOMMU_PAGESIZE), 0, in iommu_dma_bindhdl()

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