Home
last modified time | relevance | path

Searched refs:ce2 (Results 1 – 4 of 4) sorted by relevance

/titanic_44/usr/src/lib/libslp/clib/
H A Dslp_da_cache.c151 cache_entry_t *ce, **ce2; in slp_put_das_cached() local
186 ce2 = slp_tsearch((void *) ce, &da_cache, compare_entries); in slp_put_das_cached()
187 if (ce != *ce2) { in slp_put_das_cached()
189 free((void *) ((*ce2)->query)); in slp_put_das_cached()
190 free((void *) ((*ce2)->reply)); in slp_put_das_cached()
191 free(*ce2); in slp_put_das_cached()
192 *ce2 = ce; in slp_put_das_cached()
/titanic_44/usr/src/uts/sun4/sys/
H A Derrclassify.h118 #define CE_INITDISPTBL_INDEX(afarmatch, ecstate, ce1, ce2) \ argument
119 ((afarmatch) << 5 | (ecstate) << 2 | (ce2) << 1 | (ce1))
121 #define CE_DISPACT(array, afarmatch, ecstate, ce1, ce2) \ argument
122 (array[CE_INITDISPTBL_INDEX(afarmatch, ecstate, ce1, ce2)])
/titanic_44/usr/src/cmd/fm/modules/sun4/cpumem-diagnosis/
H A Dcmd_memerr.c672 int ce2 = CE_XDIAG_CE2SEEN(ptnrinfo); in cmd_ce_common() local
674 if (ce1 && ce2) { in cmd_ce_common()
/titanic_44/usr/src/data/hwdata/
H A Dpci.ids28501 2ce2 Xeon C5500/C3500 Integrated Memory Controller Channel 0 Rank
30449 9ce2 Wildcat Point-LP Serial IO I2C Controller #1