| /titanic_44/usr/src/uts/common/io/nge/ |
| H A D | nge_xmii.c | 318 uint16_t anar; in nge_update_copper() local
343 control = anar = gigctrl = 0; in nge_update_copper()
443 anar |= MII_ABILITY_100BASE_TX_FD; in nge_update_copper()
445 anar |= MII_ABILITY_100BASE_TX; in nge_update_copper()
447 anar |= MII_ABILITY_10BASE_T_FD; in nge_update_copper()
449 anar |= MII_ABILITY_10BASE_T; in nge_update_copper()
452 anar |= MII_ABILITY_PAUSE; in nge_update_copper()
454 anar |= MII_ABILITY_ASMPAUSE; in nge_update_copper()
459 anar |= MII_AN_SELECTOR_8023; in nge_update_copper()
464 nge_mii_put16(ngep, MII_AN_ADVERT, anar); in nge_update_copper()
[all …]
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| /titanic_44/usr/src/uts/common/io/mii/ |
| H A D | mii.c | 1212 uint16_t bmcr, anar, gtcr; in phy_start() local
1293 anar = 0; in phy_start()
1295 anar |= MII_ABILITY_X_FD; in phy_start()
1298 anar |= MII_ABILITY_X_HD; in phy_start()
1301 anar |= MII_ABILITY_X_PAUSE; in phy_start()
1304 anar |= MII_ABILITY_X_ASMPAUSE; in phy_start()
1309 anar = 0; in phy_start()
1311 anar |= MII_ABILITY_T2_FD; in phy_start()
1314 anar |= MII_ABILITY_T2_HD; in phy_start()
1318 anar = MII_AN_SELECTOR_8023; in phy_start()
[all …]
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| /titanic_44/usr/src/uts/common/io/bfe/ |
| H A D | bfe.c | 548 uint16_t bmsr, bmcr, anar; in bfe_startup_phy() local
564 anar = bfe_read_phy(bfe, MII_AN_ADVERT); in bfe_startup_phy()
567 anar &= ~(MII_ABILITY_100BASE_T4 | in bfe_startup_phy()
600 anar |= MII_ABILITY_100BASE_TX_FD; in bfe_startup_phy()
604 anar |= MII_ABILITY_100BASE_TX_FD; in bfe_startup_phy()
612 anar |= MII_ABILITY_100BASE_T4; in bfe_startup_phy()
616 anar |= MII_ABILITY_100BASE_T4; in bfe_startup_phy()
624 anar |= MII_ABILITY_100BASE_TX; in bfe_startup_phy()
628 anar |= MII_ABILITY_100BASE_TX; in bfe_startup_phy()
636 anar |= MII_ABILITY_10BASE_T_FD; in bfe_startup_phy()
[all …]
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| /titanic_44/usr/src/uts/common/io/bge/ |
| H A D | bge_mii.c | 922 uint16_t anar; in bge_update_copper() local
939 control = gigctrl = auxctrl = anar = 0; in bge_update_copper()
1059 anar |= MII_ABILITY_100BASE_TX_FD; in bge_update_copper()
1061 anar |= MII_ABILITY_100BASE_TX; in bge_update_copper()
1063 anar |= MII_ABILITY_10BASE_T_FD; in bge_update_copper()
1065 anar |= MII_ABILITY_10BASE_T; in bge_update_copper()
1068 anar |= MII_ABILITY_PAUSE; in bge_update_copper()
1070 anar |= MII_ABILITY_ASMPAUSE; in bge_update_copper()
1075 anar |= MII_AN_SELECTOR_8023; in bge_update_copper()
1086 bge_mii_put16(bgep, MII_AN_ADVERT, anar); in bge_update_copper()
[all …]
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| /titanic_44/usr/src/uts/common/io/mxfe/ |
| H A D | mxfe.c | 1260 unsigned anar; in mxfe_startphymii() local
1337 anar = mxfe_miiread(mxfep, phyaddr, MII_AN_ADVERT); in mxfe_startphymii()
1339 anar &= ~(MII_ABILITY_100BASE_T4 | in mxfe_startphymii()
1371 anar |= MII_ABILITY_100BASE_T4; in mxfe_startphymii()
1375 anar |= MII_ABILITY_100BASE_TX_FD; in mxfe_startphymii()
1379 anar |= MII_ABILITY_100BASE_TX; in mxfe_startphymii()
1383 anar |= MII_ABILITY_10BASE_T_FD; in mxfe_startphymii()
1387 anar |= MII_ABILITY_10BASE_T; in mxfe_startphymii()
1421 DBG(DPHY, "programming anar to 0x%x", anar); in mxfe_startphymii()
1422 mxfe_miiwrite(mxfep, phyaddr, MII_AN_ADVERT, anar); in mxfe_startphymii()
[all …]
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| /titanic_44/usr/src/uts/common/io/rge/ |
| H A D | rge_chip.c | 401 uint16_t anar; in rge_phy_update() local
416 control = gigctrl = anar = 0; in rge_phy_update()
541 anar |= MII_ABILITY_100BASE_TX_FD; in rge_phy_update()
543 anar |= MII_ABILITY_100BASE_TX; in rge_phy_update()
545 anar |= MII_ABILITY_10BASE_T_FD; in rge_phy_update()
547 anar |= MII_ABILITY_10BASE_T; in rge_phy_update()
550 anar |= MII_ABILITY_PAUSE; in rge_phy_update()
552 anar |= MII_ABILITY_ASMPAUSE; in rge_phy_update()
557 anar |= MII_AN_SELECTOR_8023; in rge_phy_update()
572 rge_mii_put16(rgep, MII_AN_ADVERT, anar); in rge_phy_update()
[all …]
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| /titanic_44/usr/src/uts/sun/io/eri/ |
| H A D | eri.c | 4966 uint16_t control, aner, anlpar, anar, an_common; in eri_mif_check() local
5055 (void) eri_mii_read(erip, ERI_PHY_ANAR, &anar); in eri_mif_check()
5056 an_common = anar & anlpar; in eri_mif_check()
5207 uint16_t anar; in eri_reset_xcvr() local
5256 (void) eri_mii_read(erip, ERI_PHY_ANAR, &anar); in eri_reset_xcvr()
5261 "eri_reset_xcvr: control %x stat %x anar %x", control, stat, anar); in eri_reset_xcvr()
5290 anar = PHY_SELECTOR; in eri_reset_xcvr()
5292 anar |= PHY_ANAR_T4; in eri_reset_xcvr()
5294 anar |= PHY_ANAR_TXFDX; in eri_reset_xcvr()
5296 anar |= PHY_ANAR_TX; in eri_reset_xcvr()
[all …]
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| /titanic_44/usr/src/uts/common/io/nxge/npi/ |
| H A D | npi_mac.c | 3284 mii_anar_t anar; in npi_mac_pcs_mii_read() local
3322 anar.value = 0; in npi_mac_pcs_mii_read()
3323 anar.bits.cap_pause = pcs_anar.bits.w0.pause; in npi_mac_pcs_mii_read()
3324 anar.bits.cap_asmpause = pcs_anar.bits.w0.asm_pause; in npi_mac_pcs_mii_read()
3325 *value = anar.value; in npi_mac_pcs_mii_read()
3366 mii_anar_t anar; in npi_mac_pcs_mii_write() local
3380 anar.value = value; in npi_mac_pcs_mii_write()
3381 pcs_anar.bits.w0.asm_pause = anar.bits.cap_asmpause; in npi_mac_pcs_mii_write()
3382 pcs_anar.bits.w0.pause = anar.bits.cap_pause; in npi_mac_pcs_mii_write()
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| /titanic_44/usr/src/uts/common/io/nxge/ |
| H A D | nxge_mac.c | 4797 mii_anar_t anar; in nxge_mii_xcvr_init() local
4985 anar.value = 0; in nxge_mii_xcvr_init()
4986 anar.bits.selector = 1; in nxge_mii_xcvr_init()
4987 anar.bits.cap_100T4 = param_arr[param_anar_100T4].value; in nxge_mii_xcvr_init()
4988 anar.bits.cap_100fdx = param_arr[param_anar_100fdx].value; in nxge_mii_xcvr_init()
4989 anar.bits.cap_100hdx = param_arr[param_anar_100hdx].value; in nxge_mii_xcvr_init()
4990 anar.bits.cap_10fdx = param_arr[param_anar_10fdx].value; in nxge_mii_xcvr_init()
4991 anar.bits.cap_10hdx = param_arr[param_anar_10hdx].value; in nxge_mii_xcvr_init()
4992 anar.bits.cap_asmpause = 0; in nxge_mii_xcvr_init()
4993 anar.bits.cap_pause = 0; in nxge_mii_xcvr_init()
[all …]
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| /titanic_44/usr/src/uts/common/sys/nxge/ |
| H A D | nxge_mii.h | 64 uchar_t anar; /* Auto-Negotiation advertisement register */ member
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