/titanic_44/usr/src/uts/common/io/fibre-channel/fca/qlc/ |
H A D | ql_api.c | 2269 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_quiesce() 2271 WRT32_IO_REG(ha, hccr, HC24_SET_HOST_INT); in ql_quiesce() 2276 WRT32_IO_REG(ha, hccr, in ql_quiesce() 2280 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_quiesce() 2285 WRT32_IO_REG(ha, ctrl_status, ISP_RESET | DMA_SHUTDOWN | in ql_quiesce() 11491 WRT32_IO_REG(ha, ctrl_status, in ql_24xx_read_flash() 11494 WRT32_IO_REG(ha, flash_address, faddr & ~FLASH_DATA_FLAG); in ql_24xx_read_flash() 11546 WRT32_IO_REG(ha, ctrl_status, in ql_24xx_write_flash() 11549 WRT32_IO_REG(ha, flash_data, data); in ql_24xx_write_flash() 11551 WRT32_IO_REG(ha, flash_address, addr | FLASH_DATA_FLAG); in ql_24xx_write_flash() [all …]
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H A D | ql_init.c | 205 WRT32_IO_REG(ha, ictrl, ISP_EN_RISC); in ql_initialize_adapter() 3709 WRT32_IO_REG(ha, ctrl_status, DMA_SHUTDOWN | MWB_4096_BYTES); in ql_reset_24xx_chip() 3720 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_reset_24xx_chip() 3722 WRT32_IO_REG(ha, hccr, HC24_SET_HOST_INT); in ql_reset_24xx_chip() 3727 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_reset_24xx_chip() 3730 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_reset_24xx_chip() 3736 WRT32_IO_REG(ha, ctrl_status, ISP_RESET | DMA_SHUTDOWN | in ql_reset_24xx_chip() 3764 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_reset_24xx_chip() 3766 WRT32_IO_REG(ha, hccr, HC24_SET_HOST_INT); in ql_reset_24xx_chip() 3771 WRT32_IO_REG(ha, hccr, in ql_reset_24xx_chip() [all …]
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H A D | ql_mbx.c | 157 WRT32_IO_REG(ha, nx_host_int, NX_MBX_CMD); in ql_mailbox_command() 159 WRT32_IO_REG(ha, hccr, HC24_SET_HOST_INT); in ql_mailbox_command() 3363 WRT32_IO_REG(ha, req_out, 0); in ql_init_firmware() 3364 WRT32_IO_REG(ha, resp_in, 0); in ql_init_firmware() 3365 WRT32_IO_REG(ha, resp_out, 0); in ql_init_firmware() 3367 WRT32_IO_REG(ha, req_in, 0); in ql_init_firmware() 3368 WRT32_IO_REG(ha, resp_out, 0); in ql_init_firmware() 3369 WRT32_IO_REG(ha, pri_req_in, 0); in ql_init_firmware() 3370 WRT32_IO_REG(ha, atio_req_out, 0); in ql_init_firmware()
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H A D | ql_isr.c | 489 WRT32_IO_REG(ha, hccr, in ql_isr_aif() 645 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_spurious_intr() 707 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_mbx_completion() 797 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_async_event() 1420 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_async_event() 1545 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT); in ql_response_pkt()
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H A D | ql_ioctl.c | 881 WRT32_IO_REG(ha, ctrl_status, in ql_24xx_load_nvram() 909 WRT32_IO_REG(ha, ctrl_status, in ql_24xx_load_nvram()
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H A D | ql_nx.c | 1770 WRT32_IO_REG(ha, nx_risc_int, 0); in ql_8021_clr_fw_intr()
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H A D | ql_xioctl.c | 6091 WRT32_IO_REG(ha, gpiod, gpio_data); in ql_drive_led() 6101 WRT32_IO_REG(ha, gpiod, gpio_data); in ql_drive_led() 6183 WRT32_IO_REG(ha, gpiod, gpio_data); in ql_wrapup_led()
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/titanic_44/usr/src/uts/common/sys/fibre-channel/fca/qlc/ |
H A D | ql_api.h | 236 #define WRT32_IO_REG(ha, regname, data) \ macro
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