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Searched refs:REG_DEV_SETUP (Results 1 – 4 of 4) sorted by relevance

/titanic_44/usr/src/uts/common/io/chxge/com/
H A Dvsc7321.c146 { REG_DEV_SETUP(0), 0x00000001 },
148 { REG_DEV_SETUP(0), 0x00000046 },
168 { REG_DEV_SETUP(1), 0x00000001 },
170 { REG_DEV_SETUP(1), 0x00000046 },
190 { REG_DEV_SETUP(2), 0x00000001 },
192 { REG_DEV_SETUP(2), 0x00000046 },
212 { REG_DEV_SETUP(3), 0x00000001 },
214 { REG_DEV_SETUP(3), 0x00000046 },
H A Dvsc7326.c156 { REG_DEV_SETUP(0), 0x00000083 },
157 { REG_DEV_SETUP(0), 0x00000082 },
182 { REG_DEV_SETUP(1), 0x00000083 },
183 { REG_DEV_SETUP(1), 0x00000082 },
208 { REG_DEV_SETUP(2), 0x00000083 },
209 { REG_DEV_SETUP(2), 0x00000082 },
234 { REG_DEV_SETUP(3), 0x00000083 },
235 { REG_DEV_SETUP(3), 0x00000082 },
350 vsc_write(adapter, REG_DEV_SETUP(port), 0x0); in run_bist_all()
375 vsc_write(adapter, REG_DEV_SETUP(port), 0x1); in run_bist_all()
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H A Dvsc7321_reg.h199 #define REG_DEV_SETUP(pn) CRA(0x1,pn,0x0b) /* MAC clock/reset setup */ macro
H A Dvsc7326_reg.h207 #define REG_DEV_SETUP(pn) CRA(0x1,pn,0x0b) /* MAC clock/reset setup */ macro