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Searched refs:RB_CTRL (Results 1 – 2 of 2) sorted by relevance

/titanic_44/usr/src/uts/common/io/yge/
H A Dyge.c2558 CSR_WRITE_1(dev, RB_ADDR(port->p_txsq, RB_CTRL), RB_RST_SET); in yge_start_port()
2648 CSR_WRITE_1(dev, RB_ADDR(rxq, RB_CTRL), RB_RST_CLR); in yge_set_rambuffer()
2666 CSR_WRITE_1(dev, RB_ADDR(rxq, RB_CTRL), RB_ENA_OP_MD); in yge_set_rambuffer()
2667 (void) CSR_READ_1(dev, RB_ADDR(rxq, RB_CTRL)); in yge_set_rambuffer()
2670 CSR_WRITE_1(dev, RB_ADDR(txq, RB_CTRL), RB_RST_CLR); in yge_set_rambuffer()
2676 CSR_WRITE_1(dev, RB_ADDR(txq, RB_CTRL), RB_ENA_STFWD); in yge_set_rambuffer()
2677 CSR_WRITE_1(dev, RB_ADDR(txq, RB_CTRL), RB_ENA_OP_MD); in yge_set_rambuffer()
2678 (void) CSR_READ_1(dev, RB_ADDR(txq, RB_CTRL)); in yge_set_rambuffer()
2759 CSR_WRITE_1(dev, RB_ADDR(txq, RB_CTRL), RB_RST_SET | RB_DIS_OP_MD); in yge_stop_port()
2775 CSR_WRITE_1(dev, RB_ADDR(txq, RB_CTRL), RB_RST_SET); in yge_stop_port()
[all …]
H A Dyge.h441 #define RB_CTRL 0x28 /* 8 bit RAM Buffer Control Register */ macro