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Searched refs:R200_EMIT_PP_TXCBLEND_0 (Results 1 – 2 of 2) sorted by relevance

/titanic_44/usr/src/uts/intel/io/drm/
H A Dradeon_drm.h103 #define R200_EMIT_PP_TXCBLEND_0 21 /* tex0/4 */ macro
H A Dradeon_state.c206 case R200_EMIT_PP_TXCBLEND_0: in radeon_check_and_fixup_packets()