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Searched refs:PCI_REG_ADDR_M (Results 1 – 20 of 20) sorted by relevance

/titanic_44/usr/src/uts/common/sys/
H A Dpci.h1162 #define PCI_REG_ADDR_M 0x3000000 /* address space mask */ macro
1179 #define PCI_REG_ADDR_G(x) (((x) & PCI_REG_ADDR_M) >> PCI_REG_ADDR_SHIFT)
1185 #define PCI_ADDR_MASK PCI_REG_ADDR_M
/titanic_44/usr/src/uts/sun4/io/px/
H A Dpx_util.c149 uint32_t space_type = phys_hi & PCI_REG_ADDR_M; /* 28-bit */ in px_reloc_reg()
182 uint32_t assign_type = assign_p->pci_phys_hi & PCI_REG_ADDR_M; in px_reloc_reg()
H A Dpx_fm.c173 if ((rp->pci_phys_hi & PCI_REG_ADDR_M) == in px_fm_acc_setup()
198 if ((rp->pci_phys_hi & PCI_REG_ADDR_M) == in px_fm_acc_setup()
H A Dpx.c767 if ((rp->pci_phys_hi & PCI_REG_ADDR_M) == PCI_ADDR_CONFIG) { in px_map()
/titanic_44/usr/src/uts/sun4u/io/pci/
H A Dpci_util.c183 uint32_t space_type = phys_hi & PCI_REG_ADDR_M; in pci_reloc_reg()
184 uint32_t assign_type = assign_p->pci_phys_hi & PCI_REG_ADDR_M; in pci_reloc_reg()
H A Dpcipsy.c302 if ((rng_p->child_high & PCI_REG_ADDR_M) == PCI_ADDR_CONFIG) in pci_fix_ranges()
/titanic_44/usr/src/uts/i86pc/io/gfx_private/
H A Dgfxp_vgatext.c390 PCI_REG_ADDR_M|PCI_REG_REL_M, in gfxp_vgatext_attach()
401 PCI_REG_ADDR_M|PCI_REG_REL_M, in gfxp_vgatext_attach()
/titanic_44/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_util.c145 register uint32_t mask = PCI_REG_ADDR_M | PCI_CONF_ADDR_MASK; in pcmu_reloc_reg()
H A Dpcicmu.c1155 if ((rng_p->child_high & PCI_REG_ADDR_M) == PCI_ADDR_CONFIG) in pcmu_fix_ranges()
/titanic_44/usr/src/uts/intel/io/vgatext/
H A Dvgatext.c509 PCI_REG_ADDR_M|PCI_REG_REL_M, in vgatext_attach()
519 PCI_REG_ADDR_M|PCI_REG_REL_M, in vgatext_attach()
/titanic_44/usr/src/uts/i86pc/io/pci/
H A Dpci.c415 space = pci_rp->pci_phys_hi & PCI_REG_ADDR_M; in pci_bus_map()
H A Dpci_common.c997 if (((phys_hi & PCI_REG_ADDR_M) == PCI_ADDR_CONFIG) || in pci_common_get_reg_prop()
/titanic_44/usr/src/uts/i86pc/io/pciex/
H A Dnpe.c488 space = pci_rp->pci_phys_hi & PCI_REG_ADDR_M; in npe_bus_map()
/titanic_44/usr/src/uts/common/io/
H A Dbusra.c138 #define PCI_ADDR_TYPE_MASK (PCI_REG_ADDR_M | PCI_REG_PF_M)
/titanic_44/usr/src/uts/common/os/
H A Dpcifm.c1317 if ((pci_ranges->child_high & PCI_REG_ADDR_M) == in pci_fix_ranges()
/titanic_44/usr/src/uts/common/io/vr/
H A Dvr.c604 addr = vrp->regset[n].reg.pci_phys_hi & PCI_REG_ADDR_M; in vr_bus_config()
/titanic_44/usr/src/uts/intel/io/pci/
H A Dpci_boot.c3115 if ((type & PCI_REG_ADDR_M) == PCI_ADDR_MEM32 && in memlist_to_ranges()
/titanic_44/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c2197 switch (ranges[i].parent_hi & PCI_REG_ADDR_M) { in cardbus_free_bridge_resources()
/titanic_44/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c2600 switch (ranges[i].parent_high & PCI_REG_ADDR_M) { in pcicfg_free_bridge_resources()
/titanic_44/usr/src/uts/sun4/io/
H A Dpcicfg.c2842 switch (ranges[i].parent_hi & PCI_REG_ADDR_M) { in pcicfg_free_bridge_resources()