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Searched refs:PCI_CAP_ID_PCI_E (Results 1 – 25 of 29) sorted by relevance

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/titanic_44/usr/src/uts/sun4v/io/px/
H A Dpx_libhv.c92 (hdr_cap_id != PCI_CAP_ID_PCI_E)) { in hvio_rp_mps()
109 if (hdr_cap_id != PCI_CAP_ID_PCI_E) in hvio_rp_mps()
/titanic_44/usr/src/uts/common/io/igb/
H A Digb_osdep.c69 uint8_t pcie_id = PCI_CAP_ID_PCI_E; in e1000_read_pcie_cap_reg()
93 uint8_t pcie_id = PCI_CAP_ID_PCI_E; in e1000_write_pcie_cap_reg()
/titanic_44/usr/src/lib/libprtdiag_psr/sparc/opl/common/
H A Dopl_picl.h71 #define PCI_CAP_ID_PCI_E 0x10 /* PCI Express supported */ macro
H A Dopl_picl.c689 if (capid == PCI_CAP_ID_PCI_E) { in get_lane_width()
/titanic_44/usr/src/uts/common/io/e1000g/
H A De1000g_osdep.c125 uint8_t pcie_id = PCI_CAP_ID_PCI_E; in e1000_write_pcie_cap_reg()
/titanic_44/usr/src/uts/intel/io/pciex/
H A Dpcie_nvidia.c70 if (cap == PCI_CAP_ID_PCI_E) { in check_if_device_is_pciex()
/titanic_44/usr/src/uts/common/io/cxgbe/t4nex/
H A Dosdep.h113 #define PCI_CAP_ID_EXP PCI_CAP_ID_PCI_E
/titanic_44/usr/src/uts/common/io/i40e/
H A Di40e_osdep.c202 uint8_t pcie_id = PCI_CAP_ID_PCI_E; in i40e_set_hw_bus_info()
/titanic_44/usr/src/uts/common/sys/fibre-channel/fca/emlxs/
H A Demlxs_os.h174 #define PCI_CAP_ID_PCI_E 0x10 /* PCI Express supported */
/titanic_44/usr/src/uts/common/io/
H A Dpci_cap.c74 if (id == PCI_CAP_ID_PCI_E) in pci_cap_probe()
/titanic_44/usr/src/uts/common/io/pciex/
H A Dpcie.c1023 case PCI_CAP_ID_PCI_E: in pcie_init_bus()
1932 if ((PCI_CAP_LOCATE(config_handle, PCI_CAP_ID_PCI_E, &cap_ptr)) == in pcie_get_max_supported()
1979 if ((PCI_CAP_LOCATE(config_handle, PCI_CAP_ID_PCI_E, in pcie_root_port()
2251 if ((PCI_CAP_LOCATE(handle, PCI_CAP_ID_PCI_E, &cap_ptr)) in pcie_ari_device()
H A Dpcieb.c321 if (PCI_CAP_LOCATE(cfg_hdl, PCI_CAP_ID_PCI_E, &cap_ptr) in pcieb_41210_mps_wkrnd()
/titanic_44/usr/src/uts/common/sys/
H A Dpci.h617 #define PCI_CAP_ID_PCI_E 0x10 /* PCI Express supported */ macro
/titanic_44/usr/src/uts/common/os/
H A Dsunpci.c308 {PCI_CAP_ID_PCI_E, 0, 0, PCI_CAP_SZUNKNOWN, pci_pcie_save},
434 if (cap_id == PCI_CAP_ID_PCI_E) {
/titanic_44/usr/src/cmd/pcitool/
H A Dpcitool.c510 (hdr_cap_id != PCI_CAP_ID_PCI_E)) { in supports_ari()
529 if (hdr_cap_id != PCI_CAP_ID_PCI_E) in supports_ari()
/titanic_44/usr/src/uts/common/sys/fibre-channel/fca/qlc/
H A Dql_nx.h1134 #define PCI_CAP_ID_PCI_E 0x10 /* PCI Express supported */ macro
/titanic_44/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_hba.c68 {PCI_CAP_ID_PCI_E, "PCI_CAP_ID_PCI_E"},
3027 if (! hba->pci_cap_offset[PCI_CAP_ID_PCI_E]) { in emlxs_pci_cap_offsets()
H A Demlxs_solaris.c1408 if (!hba->pci_cap_offset[PCI_CAP_ID_PCI_E]) { in emlxs_disable_pcie_ce_err()
1416 hba->pci_cap_offset[PCI_CAP_ID_PCI_E] + in emlxs_disable_pcie_ce_err()
1423 hba->pci_cap_offset[PCI_CAP_ID_PCI_E] + in emlxs_disable_pcie_ce_err()
/titanic_44/usr/src/uts/sun4/io/
H A Dpcicfg.c591 } else if ((PCI_CAP_LOCATE(handle, PCI_CAP_ID_PCI_E, &cap_ptr)) in pcicfg_get_nslots()
666 if ((PCI_CAP_LOCATE(handle, PCI_CAP_ID_PCI_E, &cap_ptr)) != in pcicfg_pcie_port_type()
3537 ret = PCI_CAP_LOCATE(config_handle, PCI_CAP_ID_PCI_E, &cap_ptr); in pcicfg_set_standard_props()
3967 if ((PCI_CAP_LOCATE(h, PCI_CAP_ID_PCI_E, &cap_ptr)) == in pcicfg_disable_bridge_probe_err()
/titanic_44/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c3310 (void) PCI_CAP_LOCATE(config_handle, PCI_CAP_ID_PCI_E, &cap_id_loc); in pcicfg_set_standard_props()
5119 (void) PCI_CAP_LOCATE(handle, PCI_CAP_ID_PCI_E, &cap_id_loc); in pcicfg_get_nslots()
5187 (void) PCI_CAP_LOCATE(handle, PCI_CAP_ID_PCI_E, &cap_loc); in pcicfg_pcie_port_type()
/titanic_44/usr/src/uts/common/io/rge/
H A Drge_chip.c708 PCI_CAP_ID_PCI_E, &val16) == DDI_SUCCESS; in rge_chip_ident()
/titanic_44/usr/src/uts/common/io/atge/
H A Datge_main.c1198 err = PCI_CAP_LOCATE(atgep->atge_conf_handle, PCI_CAP_ID_PCI_E, in atge_attach()
/titanic_44/usr/src/uts/i86pc/io/
H A Dimmu_dvma.c576 if (cap == PCI_CAP_ID_PCI_E) { in device_is_pciex()
/titanic_44/usr/src/uts/common/io/myri10ge/drv/
H A Dmyri10ge.c4832 err = myri10ge_find_cap(handle, &ptr, PCI_CAP_ID_PCI_E); in myri10ge_set_max_readreq()
4859 err = myri10ge_find_cap(handle, &ptr, PCI_CAP_ID_PCI_E); in myri10ge_read_pcie_link_width()
/titanic_44/usr/src/uts/intel/io/pci/
H A Dpci_boot.c933 cap_ptr = get_pci_cap(bus, dev, func, PCI_CAP_ID_PCI_E); in fix_ppb_res()

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