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Searched refs:PBF_REG_P0_PAUSE_ENABLE (Results 1 – 3 of 3) sorted by relevance

/titanic_44/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_hw_init_reset.c3263 REG_WR(pdev,(PORT_ID(pdev) ? PBF_REG_P1_PAUSE_ENABLE : PBF_REG_P0_PAUSE_ENABLE),0); in init_pbf_port()
/titanic_44/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c2770 REG_WR(cb, PBF_REG_P0_PAUSE_ENABLE + port*4, 1); in elink_pbf_update()
2779 REG_WR(cb, PBF_REG_P0_PAUSE_ENABLE + port*4, 0); in elink_pbf_update()
/titanic_44/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A D57712_reg.h11194 #define PBF_REG_P0_PAUSE_ENABLE macro