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Searched refs:MSR_P4_LBSTK_0 (Results 1 – 2 of 2) sorted by relevance

/titanic_44/usr/src/cmd/mdb/intel/kmdb/
H A Dkvm_cpu_p4.c169 { MSR_P4_LBSTK_0, KDI_MSR_READ },
179 MSR_P4_LBSTK_0, MSR_P4_LBSTK_0, 4
/titanic_44/usr/src/uts/intel/sys/
H A Dx86_archext.h271 #define MSR_P4_LBSTK_0 0x1db macro