Searched refs:MSR_AMD_HWCR (Results 1 – 5 of 5) sorted by relevance
| /titanic_44/usr/src/grub/grub-0.97/stage2/ |
| H A D | controlregs.h | 140 #define MSR_AMD_HWCR 0xc0010015 macro
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| /titanic_44/usr/src/uts/intel/sys/ |
| H A D | controlregs.h | 197 #define MSR_AMD_HWCR 0xc0010015 macro
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| /titanic_44/usr/src/uts/i86pc/cpu/amd_opteron/ |
| H A D | ao_mca.c | 825 if (cmi_hdl_rdmsr(hdl, MSR_AMD_HWCR, &hwcr) != CMI_SUCCESS) in ao_bankstatus_prewrite()
832 (void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr); in ao_bankstatus_prewrite()
846 (void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr); in ao_bankstatus_postwrite()
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| /titanic_44/usr/src/uts/i86pc/cpu/authenticamd/ |
| H A D | authamd_main.c | 251 if (cmi_hdl_rdmsr(hdl, MSR_AMD_HWCR, &hwcr) != CMI_SUCCESS) in authamd_bankstatus_prewrite()
258 (void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr); in authamd_bankstatus_prewrite()
269 (void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr); in authamd_bankstatus_postwrite()
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| /titanic_44/usr/src/uts/i86pc/os/ |
| H A D | mp_startup.c | 771 if (((rdmsr(MSR_AMD_HWCR) & AMD_HWCR_TLBCACHEDIS) == 0) || in do_erratum_298()
783 (((rdmsr(MSR_AMD_HWCR) & AMD_HWCR_TLBCACHEDIS) == 0) || in do_erratum_298()
978 const uint_t msr = MSR_AMD_HWCR; in workaround_errata()
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