Searched refs:MSR_AMD_FSBASE (Results 1 – 12 of 12) sorted by relevance
| /titanic_44/usr/src/grub/grub-0.97/stage2/ |
| H A D | controlregs.h | 127 #define MSR_AMD_FSBASE 0xc0000100 /* 64-bit base address for %fs */ macro
|
| /titanic_44/usr/src/uts/intel/sys/ |
| H A D | controlregs.h | 183 #define MSR_AMD_FSBASE 0xc0000100 /* 64-bit base address for %fs */ macro
|
| /titanic_44/usr/src/uts/i86pc/ml/ |
| H A D | bios_call_src.s | 134 movl $MSR_AMD_FSBASE, %ecx
424 movl $MSR_AMD_FSBASE, %ecx
|
| H A D | fb_swtch_src.s | 131 movl $MSR_AMD_FSBASE, %ecx
|
| H A D | mpcore.s | 292 movl $MSR_AMD_FSBASE, %ecx
|
| H A D | cpr_wakecode.s | 140 movl $MSR_AMD_FSBASE, %ecx
700 movl $MSR_AMD_FSBASE, %ecx
|
| /titanic_44/usr/src/uts/intel/amd64/sys/ |
| H A D | privregs.h | 132 movl $MSR_AMD_FSBASE, %ecx; \
|
| /titanic_44/usr/src/uts/intel/ia32/os/ |
| H A D | sundep.c | 615 wrmsr(MSR_AMD_FSBASE, pcb->pcb_fsbase); in update_sregs()
|
| H A D | desctbls.c | 707 wrmsr(MSR_AMD_FSBASE, 0x200000000ul); in init_gdt()
|
| H A D | archdep.c | 1087 PANICNVADD(pnv, "fsbase", rdmsr(MSR_AMD_FSBASE)); in panic_saveregs()
|
| /titanic_44/usr/src/uts/intel/dtrace/ |
| H A D | fasttrap_isa.c | 1733 case REG_FSBASE: return (rdmsr(MSR_AMD_FSBASE)); in fasttrap_getreg()
|
| /titanic_44/usr/src/uts/i86pc/os/ |
| H A D | trap.c | 1740 printf(fmt, "fsb", rdmsr(MSR_AMD_FSBASE), "gsb", rdmsr(MSR_AMD_GSBASE), in dumpregs()
|