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Searched refs:MISC_REG_RESET_REG_2 (Results 1 – 2 of 2) sorted by relevance

/titanic_44/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c1729 if (!(REG_RD(cb, MISC_REG_RESET_REG_2) & in elink_set_umac_rxtx()
1857 (REG_RD(cb, MISC_REG_RESET_REG_2) & in elink_xmac_init()
1911 if (REG_RD(cb, MISC_REG_RESET_REG_2) & in elink_set_xmac_rxtx()
2486 val = REG_RD(cb, MISC_REG_RESET_REG_2); in elink_update_pfc()
2720 if (REG_RD(cb, MISC_REG_RESET_REG_2) & in elink_set_bmac_rx()
14188 if (REG_RD(cb, MISC_REG_RESET_REG_2) & in elink_link_reset()
15022 (REG_RD(cb, MISC_REG_RESET_REG_2) & in elink_check_half_open_conn()
15042 } else if (REG_RD(cb, MISC_REG_RESET_REG_2) & in elink_check_half_open_conn()
/titanic_44/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A D57712_reg.h6020 #define MISC_REG_RESET_REG_2 macro