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Searched refs:MEMWIN0_BASE (Results 1 – 3 of 3) sorted by relevance

/titanic_44/usr/src/uts/common/io/cxgbe/common/
H A Dcommon.h46 MEMWIN0_BASE = 0x1b800, enumerator
H A Dt4_hw.c426 *data++ = t4_read_reg(adap, (MEMWIN0_BASE + i)); in t4_mem_win_rw()
428 t4_write_reg(adap, (MEMWIN0_BASE + i), *data++); in t4_mem_win_rw()
/titanic_44/usr/src/uts/common/io/cxgbe/t4nex/
H A Dt4_nexus.c1387 (bar0 + MEMWIN0_BASE) | V_BIR(0) | in setup_memwin()