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Searched refs:MDIO_WC_REG_XGXSBLK1_LANECTRL3 (Results 1 – 2 of 2) sorted by relevance

/titanic_44/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h545 #define MDIO_WC_REG_XGXSBLK1_LANECTRL3 0x8018 macro
/titanic_44/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c5034 MDIO_WC_REG_XGXSBLK1_LANECTRL3, in elink_warpcore_powerdown_secondport_lanes()