Searched refs:MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1 (Results 1 – 2 of 2) sorted by relevance
618 #define MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1 0x8300 macro
4151 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, 0x10); in elink_warpcore_enable_AN_KR()4282 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, in elink_warpcore_set_10G_XFI()4342 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, 0xd); in elink_warpcore_set_10G_XFI()4530 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, &digctrl_kx1); in elink_warpcore_set_sgmii_speed()4537 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, in elink_warpcore_set_sgmii_speed()4554 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, in elink_warpcore_set_sgmii_speed()4591 {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, in elink_warpcore_clear_regs()