Searched refs:MDIO_WC_REG_IEEE0BLK_MIICNTL (Results 1 – 2 of 2) sorted by relevance
| /titanic_44/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
| H A D | clc_reg.h | 530 #define MDIO_WC_REG_IEEE0BLK_MIICNTL 0x0 macro
|
| /titanic_44/usr/src/uts/common/io/bnxe/577xx/common/ |
| H A D | bnxe_clc.c | 4023 MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x1200); in elink_warpcore_restart_AN_KR()
4041 {MDIO_AN_DEVAD, MDIO_WC_REG_IEEE0BLK_MIICNTL, 0}, in elink_warpcore_enable_AN_KR()
4193 {MDIO_AN_DEVAD, MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x0}, in elink_warpcore_set_10G_KR()
4224 MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x2040); in elink_warpcore_set_10G_KR()
4243 MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x4000); in elink_warpcore_set_10G_KR()
4245 MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x0); in elink_warpcore_set_10G_KR()
4352 MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x100); in elink_warpcore_set_10G_XFI()
4599 {MDIO_WC_DEVAD, MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x2040}, in elink_warpcore_clear_regs()
4726 MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x1200); in elink_warpcore_config_runtime()
4912 MDIO_WC_REG_IEEE0BLK_MIICNTL, 0xfffe); in elink_warpcore_link_reset()
[all …]
|