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Searched refs:MDIO_WC_REG_COMBO_IEEE0_MIICTRL (Results 1 – 2 of 2) sorted by relevance

/titanic_44/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h669 #define MDIO_WC_REG_COMBO_IEEE0_MIICTRL 0xffe0 macro
/titanic_44/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c4493 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, in elink_warpcore_set_sgmii_speed()
4498 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); in elink_warpcore_set_sgmii_speed()
4519 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, val16); in elink_warpcore_set_sgmii_speed()
4524 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); in elink_warpcore_set_sgmii_speed()
4600 {MDIO_WC_DEVAD, MDIO_WC_REG_COMBO_IEEE0_MIICTRL, 0x0140} in elink_warpcore_clear_regs()
4909 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, 0xBFFF); in elink_warpcore_link_reset()
4988 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, in elink_set_warpcore_loopback()