Home
last modified time | relevance | path

Searched refs:MDIO_AN_REG_CL37_AN (Results 1 – 2 of 2) sorted by relevance

/titanic_44/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h436 #define MDIO_AN_REG_CL37_AN 0xffe0 macro
/titanic_44/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c8233 elink_cl45_write(cb, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); in elink_8073_config_init()
9819 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); in elink_8706_config_init()
9980 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); in elink_8726_config_init()
10138 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300); in elink_8727_config_speed()
10147 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x0100); in elink_8727_config_speed()