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Searched refs:MC5_IDT_CMD_WRITE (Results 1 – 1 of 1) sorted by relevance

/titanic_44/usr/src/uts/common/io/chxge/com/
H A Dmc5.c68 #define MC5_IDT_CMD_WRITE 0x1 macro
327 t1_write_reg_4(adap, A_MC5_POPEN_DATA_WR_CMD, MC5_IDT_CMD_WRITE); in init_idt52100()
328 t1_write_reg_4(adap, A_MC5_POPEN_MASK_WR_CMD, MC5_IDT_CMD_WRITE); in init_idt52100()
337 t1_write_reg_4(adap, A_MC5_DATA_WRITE_CMD, MC5_IDT_CMD_WRITE); in init_idt52100()
345 if (mc5_write(adap, MC5_IDT_LAR_ADR0, MC5_IDT_CMD_WRITE)) in init_idt52100()
350 if (mc5_write(adap, MC5_IDT_SSR0_ADR0, MC5_IDT_CMD_WRITE) || in init_idt52100()
351 mc5_write(adap, MC5_IDT_SSR1_ADR0, MC5_IDT_CMD_WRITE)) in init_idt52100()
364 MC5_IDT_CMD_WRITE)) in init_idt52100()
370 if (mc5_write(adap, MC5_IDT_SCR_ADR0, MC5_IDT_CMD_WRITE)) in init_idt52100()
375 MC5_IDT_CMD_WRITE); in init_idt52100()