/titanic_44/usr/src/uts/common/io/ixgbe/ |
H A D | ixgbe_debug.c | 50 ixgbe_log(ixgbe, "..eims: 0x%x\n", IXGBE_READ_REG(hw, IXGBE_EIMS)); in ixgbe_dump_interrupt() 51 ixgbe_log(ixgbe, "..eimc: 0x%x\n", IXGBE_READ_REG(hw, IXGBE_EIMC)); in ixgbe_dump_interrupt() 52 ixgbe_log(ixgbe, "..eiac: 0x%x\n", IXGBE_READ_REG(hw, IXGBE_EIAC)); in ixgbe_dump_interrupt() 53 ixgbe_log(ixgbe, "..eiam: 0x%x\n", IXGBE_READ_REG(hw, IXGBE_EIAM)); in ixgbe_dump_interrupt() 54 ixgbe_log(ixgbe, "..gpie: 0x%x\n", IXGBE_READ_REG(hw, IXGBE_GPIE)); in ixgbe_dump_interrupt() 60 if (ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(i))) { in ixgbe_dump_interrupt() 71 IXGBE_READ_REG(hw, IXGBE_EITR(i))); in ixgbe_dump_interrupt() 79 IXGBE_READ_REG(hw, IXGBE_RXDCTL(hw_index)), in ixgbe_dump_interrupt() 80 IXGBE_READ_REG(hw, IXGBE_SRRCTL(hw_index))); in ixgbe_dump_interrupt() 90 IXGBE_READ_REG(hw, IXGBE_TXDCTL(j))); in ixgbe_dump_interrupt() [all …]
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H A D | ixgbe_stat.c | 107 IXGBE_READ_REG(hw, IXGBE_QPRC(i)); in ixgbe_update_stats() 110 IXGBE_READ_REG(hw, IXGBE_QPTC(i)); in ixgbe_update_stats() 113 IXGBE_READ_REG(hw, IXGBE_QBRC(i)); in ixgbe_update_stats() 118 IXGBE_READ_REG(hw, IXGBE_QBTC(i)); in ixgbe_update_stats() 126 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)); in ixgbe_update_stats() 128 ((uint64_t)((IXGBE_READ_REG(hw, in ixgbe_update_stats() 151 ixgbe_ks->prc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC64); in ixgbe_update_stats() 152 ixgbe_ks->prc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC127); in ixgbe_update_stats() 153 ixgbe_ks->prc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC255); in ixgbe_update_stats() 154 ixgbe_ks->prc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC511); in ixgbe_update_stats() [all …]
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H A D | ixgbe_osdep.h | 92 #define IXGBE_WRITE_FLUSH(a) (void) IXGBE_READ_REG(a, IXGBE_STATUS) 101 #define IXGBE_READ_REG(a, reg) \ macro 106 IXGBE_READ_REG(a, ((reg) + ((index) << 2)))
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H A D | ixgbe_main.c | 2357 reg_val = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rx_ring->hw_index)); in ixgbe_setup_rx_ring() 2370 reg_val = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); in ixgbe_setup_rx_ring() 2430 reg_val = IXGBE_READ_REG(hw, IXGBE_FCTRL); in ixgbe_setup_rx() 2441 reg_val = IXGBE_READ_REG(hw, IXGBE_RXCSUM); in ixgbe_setup_rx() 2483 reg_val = IXGBE_READ_REG(hw, IXGBE_RXCTRL); in ixgbe_setup_rx() 2503 ring_mapping = IXGBE_READ_REG(hw, IXGBE_RQSMR(index >> 2)); in ixgbe_setup_rx() 2514 reg_val = IXGBE_READ_REG(hw, IXGBE_MHADD); in ixgbe_setup_rx() 2523 reg_val = IXGBE_READ_REG(hw, IXGBE_HLREG0); in ixgbe_setup_rx() 2540 reg_val = IXGBE_READ_REG(hw, IXGBE_RSCCTL(i)); in ixgbe_setup_rx() 2549 reg_val = IXGBE_READ_REG(hw, IXGBE_RSCDBU); in ixgbe_setup_rx() [all …]
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H A D | ixgbe_osdep.c | 56 val = IXGBE_READ_REG(hw, IXGBE_STATUS); in ixgbe_removed()
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H A D | ixgbe_gld.c | 112 reg_val = IXGBE_READ_REG(hw, IXGBE_FCTRL); in ixgbe_m_promisc()
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/titanic_44/usr/src/uts/common/io/ixgbe/core/ |
H A D | ixgbe_dcb_82598.c | 62 stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc)); in ixgbe_dcb_get_tc_stats_82598() 64 stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC(tc)); in ixgbe_dcb_get_tc_stats_82598() 66 stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc)); in ixgbe_dcb_get_tc_stats_82598() 68 stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC(tc)); in ixgbe_dcb_get_tc_stats_82598() 103 stats->pxofftxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(tc)); in ixgbe_dcb_get_pfc_stats_82598() 105 stats->pxoffrxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(tc)); in ixgbe_dcb_get_pfc_stats_82598() 126 reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA; in ixgbe_dcb_config_rx_arbiter_82598() 129 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_dcb_config_rx_arbiter_82598() 152 reg = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); in ixgbe_dcb_config_rx_arbiter_82598() 158 reg = IXGBE_READ_REG(hw, IXGBE_RXCTRL); in ixgbe_dcb_config_rx_arbiter_82598() [all …]
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H A D | ixgbe_common.c | 73 u32 eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); in ixgbe_init_ops_generic() 257 reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); in ixgbe_setup_fc_generic() 336 reg = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); in ixgbe_setup_fc_generic() 395 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); in ixgbe_start_hw_generic() 436 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(i)); in ixgbe_start_hw_gen2() 442 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); in ixgbe_start_hw_gen2() 491 IXGBE_READ_REG(hw, IXGBE_CRCERRS); in ixgbe_clear_hw_cntrs_generic() 492 IXGBE_READ_REG(hw, IXGBE_ILLERRC); in ixgbe_clear_hw_cntrs_generic() 493 IXGBE_READ_REG(hw, IXGBE_ERRBC); in ixgbe_clear_hw_cntrs_generic() 494 IXGBE_READ_REG(hw, IXGBE_MSPDC); in ixgbe_clear_hw_cntrs_generic() [all …]
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H A D | ixgbe_dcb_82599.c | 62 stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc)); in ixgbe_dcb_get_tc_stats_82599() 64 stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(tc)); in ixgbe_dcb_get_tc_stats_82599() 66 (((u64)(IXGBE_READ_REG(hw, IXGBE_QBTC_H(tc)))) << 32); in ixgbe_dcb_get_tc_stats_82599() 68 stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc)); in ixgbe_dcb_get_tc_stats_82599() 70 stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(tc)); in ixgbe_dcb_get_tc_stats_82599() 72 (((u64)(IXGBE_READ_REG(hw, IXGBE_QBRC_H(tc)))) << 32); in ixgbe_dcb_get_tc_stats_82599() 75 stats->qprdc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRDC(tc)); in ixgbe_dcb_get_tc_stats_82599() 102 stats->pxofftxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(tc)); in ixgbe_dcb_get_pfc_stats_82599() 104 stats->pxoffrxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(tc)); in ixgbe_dcb_get_pfc_stats_82599() 292 reg = IXGBE_READ_REG(hw, IXGBE_MFLCN); in ixgbe_dcb_config_pfc_82599() [all …]
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H A D | ixgbe_82599.c | 129 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_init_phy_ops_82599() 265 *reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC); in prot_autoc_read_82599() 385 mac->arc_subsystem_valid = !!(IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw)) in ixgbe_init_ops_82599() 441 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_get_link_capabilities_82599() 593 autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2); in ixgbe_stop_mac_link_on_d3_82599() 639 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_start_mac_link_82599() 648 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_start_mac_link_82599() 677 u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_disable_tx_laser_multispeed_fiber() 700 u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_enable_tx_laser_multispeed_fiber() 746 u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_set_hard_rate_select_speed() [all …]
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H A D | ixgbe_x540.c | 140 mac->arc_subsystem_valid = !!(IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw)) in ixgbe_init_ops_X540() 224 ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_X540() 231 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_X540() 358 eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); in ixgbe_init_eeprom_params_X540() 683 flup = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)) | IXGBE_EEC_FLUP; in ixgbe_update_flash_X540() 693 flup = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); in ixgbe_update_flash_X540() 726 reg = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); in ixgbe_poll_flash_update_done_X540() 777 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw)); in ixgbe_acquire_swfw_sync_X540() 808 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw)); in ixgbe_acquire_swfw_sync_X540() 855 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw)); in ixgbe_release_swfw_sync_X540() [all …]
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H A D | ixgbe_82598.c | 82 u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR); in ixgbe_set_pcie_completion_timeout() 269 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); in ixgbe_start_hw_82598() 276 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); in ixgbe_start_hw_82598() 313 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_get_link_capabilities_82598() 464 fctrl_reg = IXGBE_READ_REG(hw, IXGBE_FCTRL); in ixgbe_fc_enable_82598() 467 rmcs_reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_fc_enable_82598() 567 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_start_mac_link_82598() 579 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_start_mac_link_82598() 690 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_check_mac_link_82598() 700 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_check_mac_link_82598() [all …]
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H A D | ixgbe_x550.c | 314 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_setup_mux_ctl() 471 reg = IXGBE_READ_REG(hw, IXGBE_DMACR); in ixgbe_dmac_config_X550() 482 reg = IXGBE_READ_REG(hw, IXGBE_DMACR); in ixgbe_dmac_config_X550() 531 maxframe_size_kb = ((IXGBE_READ_REG(hw, IXGBE_MAXFRS) >> in ixgbe_dmac_config_tcs_X550() 536 reg = IXGBE_READ_REG(hw, IXGBE_DMCTH(tc)); in ixgbe_dmac_config_tcs_X550() 541 rx_pb_size = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(tc)); in ixgbe_dmac_config_tcs_X550() 573 reg = IXGBE_READ_REG(hw, IXGBE_DMACR); in ixgbe_dmac_update_tcs_X550() 580 reg = IXGBE_READ_REG(hw, IXGBE_DMACR); in ixgbe_dmac_update_tcs_X550() 606 eec = IXGBE_READ_REG(hw, IXGBE_EEC); in ixgbe_init_eeprom_params_X550() 639 eeer = IXGBE_READ_REG(hw, IXGBE_EEER); in ixgbe_setup_eee_X550() [all …]
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H A D | ixgbe_mbx.c | 298 u32 v2p_mailbox = IXGBE_READ_REG(hw, IXGBE_VFMAILBOX); in ixgbe_read_v2p_mailbox() 529 u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index)); in ixgbe_check_for_bit_pf() 606 vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); in ixgbe_check_for_rst_pf() 611 vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset)); in ixgbe_check_for_rst_pf() 644 p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number)); in ixgbe_obtain_mbx_lock_pf()
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H A D | ixgbe_phy.c | 436 mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC); in ixgbe_check_reset_blocked() 623 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi() 653 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi() 667 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_read_phy_reg_mdi() 732 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi() 761 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi() 2282 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_i2c_start() 2317 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_i2c_stop() 2392 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_clock_out_i2c_byte() 2412 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_get_i2c_ack() [all …]
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H A D | ixgbe_vf.c | 44 #define IXGBE_VFREAD_REG IXGBE_READ_REG 560 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); in ixgbe_check_mac_link_vf() 572 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); in ixgbe_check_mac_link_vf()
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