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Searched refs:IXGBE_HLREG0 (Results 1 – 4 of 4) sorted by relevance

/titanic_44/usr/src/uts/common/io/ixgbe/
H A Dixgbe_main.c2523 reg_val = IXGBE_READ_REG(hw, IXGBE_HLREG0); in ixgbe_setup_rx()
2528 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_val); in ixgbe_setup_rx()
2717 reg_val = IXGBE_READ_REG(hw, IXGBE_HLREG0); in ixgbe_setup_tx()
2719 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_val); in ixgbe_setup_tx()
4423 reg = IXGBE_READ_REG(&ixgbe->hw, IXGBE_HLREG0); in ixgbe_set_internal_mac_loopback()
4425 IXGBE_WRITE_REG(&ixgbe->hw, IXGBE_HLREG0, reg); in ixgbe_set_internal_mac_loopback()
/titanic_44/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_x550.c1560 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); in ixgbe_reset_hw_X550em()
1562 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); in ixgbe_reset_hw_X550em()
H A Dixgbe_common.c4619 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); in ixgbe_clear_tx_pending()
4620 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0 | IXGBE_HLREG0_LPBK); in ixgbe_clear_tx_pending()
4652 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); in ixgbe_clear_tx_pending()
H A Dixgbe_type.h1223 #define IXGBE_HLREG0 0x04240 macro