Searched refs:IMR (Results 1 – 6 of 6) sorted by relevance
| /titanic_44/usr/src/uts/intel/io/drm/ |
| H A D | i915_irq.c | 122 I915_WRITE(IMR, dev_priv->irq_mask_reg); in i915_enable_irq()
123 (void) I915_READ(IMR); in i915_enable_irq()
132 I915_WRITE(IMR, dev_priv->irq_mask_reg); in i915_disable_irq()
133 (void) I915_READ(IMR); in i915_disable_irq()
968 I915_WRITE(IMR, 0xffffffff); in i915_driver_irq_preinstall()
1018 I915_WRITE(IMR, dev_priv->irq_mask_reg); in i915_driver_irq_postinstall()
1044 I915_WRITE(IMR, 0xffffffff); in i915_driver_irq_uninstall()
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| H A D | i915_drv.c | 754 s3_priv->saveIMR = S3_READ(IMR); in i915_suspend()
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| H A D | i915_drv.h | 741 #define IMR 0x020a8 macro
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| /titanic_44/usr/src/grub/grub-0.97/netboot/ |
| H A D | ns83820.c | 273 #define IMR 0x14 macro
772 writel(0, ns->base + IMR); in ns83820_disable()
783 writel(ns->IMR_cache, ns->base + IMR); in ns83820_disable()
786 readl(ns->base + IMR); in ns83820_disable()
845 writel(0, ns->base + IMR); in ns83820_probe()
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| /titanic_44/usr/src/uts/common/io/sfe/ |
| H A D | sfereg.h | 126 #define IMR 0x14 /* Interrupt mask register */ macro
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| H A D | sfe.c | 537 OUTL(dp, IMR, 0); in sfe_reset_chip_sis900()
591 OUTL(dp, IMR, 0); in sfe_reset_chip_dp83815()
632 OUTL(dp, IMR, 0); in sfe_init_chip()
903 OUTL(dp, IMR, lp->our_intr_bits); in sfe_start_chip()
929 OUTL(dp, IMR, 0); in sfe_stop_chip()
971 OUTL(dp, IMR, 0); in sfe_stop_chip_quiesce()
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