Searched refs:HC_RISC_PAUSE (Results 1 – 3 of 3) sorted by relevance
291 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) != in ql_pci_sbus_config()313 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) == in ql_pci_sbus_config()3569 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) != 0) { in ql_reset_chip()3669 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) != 0) { in ql_reset_chip()
13179 while ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) == 0) { in ql_2200_binary_fw_dump()13291 while ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) == 0) { in ql_2200_binary_fw_dump()13386 while ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) == 0) { in ql_2300_binary_fw_dump()
672 #define HC_RISC_PAUSE BIT_5 /* Pause mode bit */ macro