Searched refs:GM_MIB_CNT_BASE (Results 1 – 1 of 1) sorted by relevance
1462 #define GM_MIB_CNT_BASE 0x0100 /* Base Address of MIB Counters */ macro1469 #define GM_RXF_UC_OK (GM_MIB_CNT_BASE + 0) /* Ucast Frames Received OK */1470 #define GM_RXF_BC_OK (GM_MIB_CNT_BASE + 8) /* BCast Frames Received OK */1471 #define GM_RXF_MPAUSE (GM_MIB_CNT_BASE + 16) /* Pause MAC Ctrl Frames Rx'd */1472 #define GM_RXF_MC_OK (GM_MIB_CNT_BASE + 24) /* MCast Frames Received OK */1473 #define GM_RXF_FCS_ERR (GM_MIB_CNT_BASE + 32) /* Rx Frame Check Seq. Error */1474 #define GM_RXF_SPARE1 (GM_MIB_CNT_BASE + 40) /* Rx spare 1 */1475 #define GM_RXO_OK_LO (GM_MIB_CNT_BASE + 48) /* Octets Received OK Lo */1476 #define GM_RXO_OK_HI (GM_MIB_CNT_BASE + 56) /* Octets Received OK Hi */1477 #define GM_RXO_ERR_LO (GM_MIB_CNT_BASE + 64) /* Octets Received Inval Lo */[all …]