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Searched refs:E1000_RXDCTL (Results 1 – 6 of 6) sorted by relevance

/titanic_44/usr/src/uts/common/io/e1000g/
H A De1000g_rx.c322 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0)); in e1000g_rx_setup()
323 E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl | 0x3); in e1000g_rx_setup()
935 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0)); in e1000g_flush_rx_ring()
943 E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl); in e1000g_flush_rx_ring()
H A De1000g_debug.c297 {"RDTR", E1000_RDTR}, {"RXDCTL(0)", E1000_RXDCTL(0)}, in mac_dump()
301 {"RXDCTL(1)", E1000_RXDCTL(1)}, {"RSRPD", E1000_RSRPD}, in mac_dump()
/titanic_44/usr/src/uts/common/io/e1000api/
H A De1000_regs.h250 #define E1000_RXDCTL(_n) ((_n) < 4 ? (0x02828 + ((_n) * 0x100)) : \ macro
H A De1000_82575.c2164 rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i)); in e1000_rx_fifo_flush_82575()
2165 E1000_WRITE_REG(hw, E1000_RXDCTL(i), in e1000_rx_fifo_flush_82575()
2173 rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i)); in e1000_rx_fifo_flush_82575()
2203 E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]); in e1000_rx_fifo_flush_82575()
/titanic_44/usr/src/grub/grub-0.97/netboot/
H A De1000_hw.h600 #define E1000_RXDCTL 0x02828 /* RX Descriptor Control - RW */ macro
743 #define E1000_82542_RXDCTL E1000_RXDCTL
/titanic_44/usr/src/uts/common/io/igb/
H A Digb_main.c2143 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(rx_ring->index)); in igb_setup_rx_ring()
2149 E1000_WRITE_REG(hw, E1000_RXDCTL(rx_ring->index), rxdctl); in igb_setup_rx_ring()