/titanic_44/usr/src/uts/common/sys/fibre-channel/fca/qlc/ |
H A D | ql_mbx.h | 273 #define IDC_FUNC_DST_MASK (BIT_5 | BIT_4) 297 #define IDC_RIT_MASK (BIT_6 | BIT_5 | BIT_4) 323 #define IDC_MS_MASK (BIT_7 | BIT_6 | BIT_5 | BIT_4) 438 #define MBX_5 BIT_5 474 #define FO1_DISABLE_100MS_LOS_WAIT BIT_5 486 #define FO2_ENABLE_SELECTIVE_CLASS_2 BIT_5 492 #define FO3_STARTUP_OPTS_VALID BIT_5 530 #define FWATTRIB2_VI BIT_5 692 #define LINK_CONFIG_PAUSE_MASK (BIT_6 | BIT_5)
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H A D | ql_api.h | 165 #define BIT_5 0x20 macro 517 #define MWB_4096_BYTES (BIT_5 | BIT_4) 518 #define MWB_2048_BYTES BIT_5 672 #define HC_RISC_PAUSE BIT_5 /* Pause mode bit */ 685 #define HC24_RISC_RESET BIT_5 /* RISC Reset mode bit. */ 802 #define VPO_TARGET_MODE_DISABLED BIT_5 1180 #define SRB_ABORT BIT_5 /* SRB to be aborted. */ 1309 #define TQF_NEED_AUTHENTICATION BIT_5 1395 #define QL_CONFIG_SPACE_SETUP BIT_5 1691 #define POINT_TO_POINT BIT_5 [all …]
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H A D | ql_iocb.h | 88 #define CF_DATA_IN BIT_5 320 #define RF_INV_E_ORDER BIT_5 /* Invalid entry order. */ 341 #define SF_ARQ_DONE BIT_5 354 #define SF_DATA_IN BIT_5 697 #define CFO_SKIP_PRLI BIT_5 703 #define CFO_IMPLICIT_LOGO_ALL BIT_5 1211 #define IPCF_FIRST_SEQ BIT_5
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H A D | ql_xioctl.h | 213 #define FLASH4096 BIT_5
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/titanic_44/usr/src/uts/common/io/comstar/port/qlt/ |
H A D | qlt_regs.h | 79 #define PCI_X_XFER_CTRL (BIT_4 | BIT_5) 99 BIT_7 | BIT_6 | BIT_5 | BIT_4 | \ 108 #define FW_INTR_STATUS_MASK (BIT_7 | BIT_6 | BIT_5 | BIT_4 | \
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H A D | qlt.c | 1336 DMEM_WR32(qlt, icb+0x5c, BIT_5 | BIT_4); /* fw options 1 */ in qlt_port_online() 1347 DMEM_WR32(qlt, icb+0x5c, BIT_11 | BIT_5 | BIT_4 | in qlt_port_online() 1349 DMEM_WR32(qlt, icb+0x60, BIT_5); in qlt_port_online() 3776 req1f = BIT_5; in qlt_send_els_response() 4012 else if (tm & BIT_5) in qlt_handle_atio()
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/titanic_44/usr/src/cmd/picl/plugins/sun4u/snowbird/envmond/ |
H A D | piclsensors.h | 73 #define HIGH_POWEROFF_BIT(_X) (BIT_5(_X))
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H A D | piclenvmond.h | 94 #define BIT_5(_X) ((_X) & 0x20) macro
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/titanic_44/usr/src/uts/common/io/skd/ |
H A D | skd.h | 71 #define BIT_5 0x00020 macro 92 #define SKD_IOMAP_IOBASE_MAPPED BIT_5
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/titanic_44/usr/src/uts/common/sys/ |
H A D | stmf_defines.h | 36 #define BIT_5 0x20 macro
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/titanic_44/usr/src/uts/common/io/fibre-channel/fca/qlc/ |
H A D | ql_init.c | 498 nv->firmware_options[1] = BIT_7 | BIT_5 | BIT_2; in ql_nvram_config() 558 BIT_5); in ql_nvram_config() 639 (icb->special_options[0] | BIT_5); in ql_nvram_config() 651 BIT_7 | BIT_6 | BIT_5 | BIT_2 | BIT_0); in ql_nvram_config() 653 (icb->firmware_options[0] & ~(BIT_5 | BIT_4)); in ql_nvram_config() 657 icb->add_fw_opt[1] = (uint8_t)(icb->add_fw_opt[1] & ~(BIT_5 | BIT_4)); in ql_nvram_config() 672 (icb->add_fw_opt[1] | BIT_5 | BIT_4); in ql_nvram_config() 685 nv->host_p[0] & BIT_5 ? (ha->cfg_flags |= CFG_SET_CACHE_LINE_SIZE_1) : in ql_nvram_config() 1009 nv->firmware_options_1[1] = BIT_5; in ql_nvram_24xx_config() 1010 nv->firmware_options_2[0] = BIT_5; in ql_nvram_24xx_config() [all …]
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H A D | ql_ioctl.c | 628 nv->firmware_options_1[1] = BIT_5; in ql_set_nvram_adapter_defaults() 629 nv->firmware_options_2[0] = BIT_5; in ql_set_nvram_adapter_defaults() 700 nv->firmware_options[1] = BIT_7 | BIT_5 | BIT_2; in ql_set_nvram_adapter_defaults()
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H A D | ql_isr.c | 1727 } else if (pkt->entry_status & BIT_5) { in ql_error_entry() 1771 if (pkt->entry_status & (BIT_5 + BIT_4 + BIT_3 + BIT_2)) { in ql_error_entry()
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H A D | ql_api.c | 4338 *bptr & (BIT_6 | BIT_5 | BIT_4))) { in ql_port_manage() 4341 (*bptr & ~(BIT_6|BIT_5|BIT_4)); in ql_port_manage() 11011 if (flash_data & BIT_5 && cnt > 2) { in ql_poll_flash()
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/titanic_44/usr/src/uts/common/sys/fibre-channel/fca/qlge/ |
H A D | qlge.h | 239 #define INIT_SETUP_RINGS BIT_5 633 #define CFG_CKSUM_HEADER_IPv4 BIT_5
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H A D | qlge_hw.h | 49 #define BIT_5 0x20 macro 412 #define RT_IDX_FC_MACH BIT_5 525 #define CQ_5_NOT_EMPTY BIT_5 2320 #define FLASH4096 BIT_5
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/titanic_44/usr/src/uts/common/io/comstar/port/fcoet/ |
H A D | fcoet_eth.c | 590 } else if (tm & BIT_5) { in fcoet_process_unsol_fcp_cmd()
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/titanic_44/usr/src/uts/common/io/fibre-channel/fca/fcoei/ |
H A D | fcoei_eth.c | 985 (FCOE_B2V_4(src + offset) & BIT_5) ? 1 : 0; in fcoei_fill_els_fpkt_resp()
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/titanic_44/usr/src/uts/common/io/fibre-channel/fca/emlxs/ |
H A D | emlxs_fct.c | 2470 } else if (tm & BIT_5) {
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