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Searched refs:AMD_IOMMU_PTDE_NXT_LVL (Results 1 – 2 of 2) sorted by relevance

/titanic_44/usr/src/uts/i86pc/io/amd_iommu/
H A Damd_iommu_page_tables.h39 #define AMD_IOMMU_PTDE_NXT_LVL (11 << 16 | 9) macro
H A Damd_iommu_page_tables.c988 AMD_IOMMU_REG_SET64(pdep, AMD_IOMMU_PTDE_NXT_LVL, in init_pde()
1062 AMD_IOMMU_REG_SET64(ptep, AMD_IOMMU_PTDE_NXT_LVL, 0); in init_pte()
1170 AMD_IOMMU_PTDE_NXT_LVL); in amd_iommu_teardown_pdte()