Home
last modified time | relevance | path

Searched refs:sc_need_sched (Results 1 – 18 of 18) sorted by relevance

/titanic_41/usr/src/uts/common/io/ural/
H A Dural_var.h89 uint32_t sc_need_sched; member
H A Dural.c430 if (sc->sc_need_sched) { in ural_txeof()
431 sc->sc_need_sched = 0; in ural_txeof()
694 sc->sc_need_sched = 1; in ural_send()
/titanic_41/usr/src/uts/common/io/rum/
H A Drum_var.h92 uint32_t sc_need_sched; member
H A Drum.c495 if (sc->sc_need_sched) { in rum_txeof()
496 sc->sc_need_sched = 0; in rum_txeof()
755 sc->sc_need_sched = 1; in rum_send()
/titanic_41/usr/src/uts/common/io/urtw/
H A Durtw_var.h90 uint32_t sc_need_sched; member
H A Durtw.c2914 if (sc->sc_need_sched) { in urtw_txeof_low()
2915 sc->sc_need_sched = 0; in urtw_txeof_low()
2944 if (sc->sc_need_sched) { in urtw_txeof_normal()
2945 sc->sc_need_sched = 0; in urtw_txeof_normal()
3586 sc->sc_need_sched = 1; in urtw_send()
/titanic_41/usr/src/uts/common/io/ral/
H A Drt2560_var.h166 uint32_t sc_need_sched; member
H A Drt2560.c1087 if (sc->sc_need_sched && in rt2560_tx_intr()
1089 sc->sc_need_sched = 0; in rt2560_tx_intr()
1584 sc->sc_need_sched = 1; in rt2560_send()
/titanic_41/usr/src/uts/common/io/rwd/
H A Drt2661_var.h176 uint32_t sc_need_sched; member
H A Drt2661.c953 if (sc->sc_need_sched) { in rt2661_tx_intr()
954 sc->sc_need_sched = 0; in rt2661_tx_intr()
1424 sc->sc_need_sched = 1; in rt2661_send()
/titanic_41/usr/src/uts/common/io/rwn/
H A Drt2860_var.h187 uint32_t sc_need_sched; member
H A Drt2860.c1111 sc->sc_need_sched = 1; in rt2860_send()
1695 if (sc->sc_need_sched && in rt2860_tx_intr()
1697 sc->sc_need_sched = 0; in rt2860_tx_intr()
/titanic_41/usr/src/uts/common/io/uath/
H A Duath_var.h225 uint32_t sc_need_sched; member
H A Duath.c1508 if (sc->sc_need_sched) { in uath_data_txeof()
1509 sc->sc_need_sched = 0; in uath_data_txeof()
2013 sc->sc_need_sched = 1; in uath_send()
/titanic_41/usr/src/uts/common/io/atu/
H A Datu.h89 boolean_t sc_need_sched; member
H A Datu.c669 if (sc->sc_need_sched) { in atu_txeof()
670 sc->sc_need_sched = 0; in atu_txeof()
1582 sc->sc_need_sched = 1; in atu_m_tx()
/titanic_41/usr/src/uts/common/io/mwl/
H A Dmwl_var.h568 uint32_t sc_need_sched; member
H A Dmwl.c2764 sc->sc_need_sched = 1; in mwl_send()
3130 if (sc->sc_need_sched && in mwl_tx_intr()
3132 sc->sc_need_sched = 0; in mwl_tx_intr()