| /titanic_41/usr/src/uts/common/io/nge/ |
| H A D | nge_rx.c | 333 if (sync_start + ngep->param_recv_max_packet <= ngep->rx_desc) { in nge_recv_ring()
345 (ngep->param_recv_max_packet + sync_start - ngep->rx_desc) * in nge_recv_ring()
393 if (sync_start + ngep->recv_count <= ngep->rx_desc) { in nge_recv_ring()
405 (ngep->recv_count + sync_start - ngep->rx_desc) * in nge_recv_ring()
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| H A D | nge_main.c | 384 rxdescsize = ngep->rx_desc; in nge_alloc_bufs()
617 rrp->desc.nslots = ngep->rx_desc; in nge_init_recv_ring()
661 for (i = 0; i < ngep->rx_desc; i++, ++bsbdp) { in nge_fini_buff_ring()
690 kmem_free(brp->sw_rbds, (ngep->rx_desc * sizeof (*bsbdp))); in nge_fini_buff_ring()
1020 ngep->rx_desc = NGE_RECV_JB2500_SLOTS_DESC; in nge_get_props()
1027 ngep->rx_desc = NGE_RECV_JB4500_SLOTS_DESC; in nge_get_props()
1034 ngep->rx_desc = NGE_RECV_JB9000_SLOTS_DESC; in nge_get_props()
1041 ngep->rx_desc = NGE_RECV_JB9000_SLOTS_DESC; in nge_get_props()
1048 ngep->rx_desc = NGE_RECV_LOWMEM_SLOTS_DESC; in nge_get_props()
1055 ngep->rx_desc = dev_param_p->rx_desc_num; in nge_get_props()
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| H A D | nge.h | 730 uint32_t rx_desc; member
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| /titanic_41/usr/src/uts/intel/io/dnet/ |
| H A D | dnet.c | 1587 struct rx_desc_type *desc = dnetp->rx_desc; in dnet_getp()
1619 } while (!(dnetp->rx_desc[marker].desc0.own) && in dnet_getp()
1647 while (!(dnetp->rx_desc[index].desc0.own)) { in dnet_getp()
1648 dnetp->rx_desc[index].desc0.own = 1; in dnet_getp()
1823 struct rx_desc_type *descp = &(dnetp->rx_desc[index]); in update_rx_stats()
2156 if ((dnetp->rx_desc != NULL) && in dnet_alloc_bufs()
2233 if (dnetp->rx_desc == NULL) { in dnet_alloc_bufs()
2239 (caddr_t *)&dnetp->rx_desc, &len, in dnet_alloc_bufs()
2244 NULL, (caddr_t)dnetp->rx_desc, in dnet_alloc_bufs()
2251 bzero(dnetp->rx_desc, len); in dnet_alloc_bufs()
[all …]
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| H A D | dnet.h | 378 struct rx_desc_type *rx_desc; /* virtual addr of recv desc */ member
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| /titanic_41/usr/src/uts/intel/io/amd8111s/ |
| H A D | amd8111s_hw.h | 798 struct rx_desc { struct
938 struct rx_desc *descriptor;
972 struct rx_desc *Rx_desc;
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| H A D | amd8111s_main.c | 509 struct rx_desc *descriptor; in amd8111s_recv_copy()
520 sizeof (struct rx_desc), DDI_DMA_SYNC_FORCPU); in amd8111s_recv_copy()
784 length = sizeof (struct rx_desc) * RX_RING_SIZE + ALIGNMENT; in amd8111s_allocate_descriptors()
813 pMil->Rx_desc = (struct rx_desc *) in amd8111s_allocate_descriptors()
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| /titanic_41/usr/src/uts/common/io/rge/ |
| H A D | rge_main.c | 348 DMA_ZERO(rgep->rx_desc); in rge_reinit_recv_ring()
365 DMA_SYNC(rgep->rx_desc, DDI_DMA_SYNC_FORDEV); in rge_reinit_recv_ring()
534 rgep->rx_desc = rgep->dma_area_rxdesc; in rge_init_recv_ring()
535 DMA_ZERO(rgep->rx_desc); in rge_init_recv_ring()
536 rgep->rx_ring = rgep->rx_desc.mem_va; in rge_init_recv_ring()
573 DMA_SYNC(rgep->rx_desc, DDI_DMA_SYNC_FORDEV); in rge_init_recv_ring()
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| H A D | rge.h | 429 dma_area_t rx_desc; member
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| H A D | rge_rxtx.c | 328 DMA_SYNC(rgep->rx_desc, DDI_DMA_SYNC_FORKERNEL); in rge_receive_ring()
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| H A D | rge_chip.c | 1000 val32 = rgep->rx_desc.cookie.dmac_laddress; in rge_chip_init()
1002 val32 = rgep->rx_desc.cookie.dmac_laddress >> 32; in rge_chip_init()
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| /titanic_41/usr/src/uts/common/io/ntxn/ |
| H A D | unm_gem.c | 702 int i, ring, tx_desc, rx_desc, rx_jdesc, maxrx; in unm_check_options() local
738 rx_desc = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, in unm_check_options()
740 if (rx_desc >= NX_MIN_DRIVER_RDS_SIZE && in unm_check_options()
741 rx_desc <= NX_MAX_SUPPORTED_RDS_SIZE && ISP2(rx_desc)) { in unm_check_options()
742 adapter->MaxRxDescCount = rx_desc; in unm_check_options()
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| /titanic_41/usr/src/uts/common/io/dmfe/ |
| H A D | dmfe_impl.h | 175 dma_area_t rx_desc; /* receive descriptors */ member
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| H A D | dmfe_main.c | 417 descp = &dmfep->rx_desc; in dmfe_init_rings()
632 descp = &dmfep->rx_desc; in dmfe_getp()
2344 &dmfep->rx_desc); in dmfe_alloc_bufs()
2400 dmfe_free_dma_mem(&dmfep->rx_desc); in dmfe_free_bufs()
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| /titanic_41/usr/src/uts/common/io/bge/ |
| H A D | bge_main2.c | 2742 &bgep->rx_desc[split]);
2756 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->rx_desc[split]);
2889 bge_slice_chunk(&bgep->recv[ring].desc, &bgep->rx_desc[ring],
2904 area = bgep->rx_desc[rx_rings]; /* note rx_rings = one beyond rings */
3038 bge_free_dma_mem(&bgep->rx_desc[split]);
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| H A D | bge_impl.h | 780 dma_area_t rx_desc[BGE_RECV_RINGS_SPLIT]; member
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| H A D | bge_kstats.c | 419 (knp++)->value.ui64 = bgep->rx_desc[0].cookie.dmac_laddress; in bge_driverinfo_update()
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| H A D | bge_chip2.c | 6095 areap = &bgep->rx_desc[0]; in bge_pp_ioctl()
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