1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright (c) 2007, 2010, Oracle and/or its affiliates. All rights reserved. 24 */ 25 26 #ifndef _SPC3_TYPES_H 27 #define _SPC3_TYPES_H 28 29 #ifdef __cplusplus 30 extern "C" { 31 #endif 32 33 #include <sys/types.h> 34 #include <sys/cdio.h> 35 #include <sys/sysmacros.h> 36 #include <sys/scsi/generic/commands.h> 37 #include <sys/scsi/impl/commands.h> 38 39 typedef enum spc3_cmd { 40 SPC3_CMD_TEST_UNIT_READY = SCMD_TEST_UNIT_READY, 41 SPC3_CMD_REZERO_UNIT = SCMD_REZERO_UNIT, 42 SPC3_CMD_REWIND = SCMD_REWIND, 43 SPC3_CMD_VENDOR_2 = 2, 44 SPC3_CMD_REQUEST_SENSE = SCMD_REQUEST_SENSE, 45 SPC3_CMD_FORMAT_UNIT = SCMD_FORMAT, 46 SPC3_CMD_FORMAT_MEDIUM = SCMD_FORMAT, 47 SPC3_CMD_FORMAT = SCMD_FORMAT, 48 SPC3_CMD_READ_BLOCK_LIMITS = SCMD_READ_BLKLIM, 49 SPC3_CMD_VENDOR_6 = 6, 50 SPC3_CMD_REASSIGN_BLOCKS = SCMD_REASSIGN_BLOCK, 51 SPC3_CMD_INITIALIZE_ELEMENT_STATUS = SCMD_REASSIGN_BLOCK, 52 SPC3_CMD_READ = SCMD_READ, 53 SPC3_CMD_READ6 = SCMD_READ, 54 SPC3_CMD_RECEIVE = SCMD_RECEIVE, 55 SPC3_CMD_GET_MESSAGE = SCMD_READ, 56 SPC3_CMD_VENDOR_9 = 9, 57 SPC3_CMD_WRITE = SCMD_WRITE, 58 SPC3_CMD_WRITE6 = SCMD_WRITE, 59 SPC3_CMD_SEND = SCMD_SEND, 60 SPC3_CMD_SEND6 = SCMD_SEND, 61 SPC3_CMD_SEND_MESSAGE = SCMD_SEND, 62 SPC3_CMD_PRINT = SCMD_PRINT, 63 SPC3_CMD_SEEK = SCMD_SEEK, 64 SPC3_CMD_SEEK6 = SCMD_SEEK, 65 SPC3_CMD_SET_CAPACITY = SCMD_SEEK, 66 SPC3_CMD_SLEW_AND_PRINT = SCMD_SLEW_PRINT, 67 SPC3_CMD_VENDOR_C = 0xc, 68 SPC3_CMD_VENDOR_D = 0xd, 69 SPC3_CMD_VENDOR_E = 0xe, 70 SPC3_CMD_READ_REVERSE = SCMD_READ_REVERSE, 71 SPC3_CMD_READ_REVERSE6 = SCMD_READ_REVERSE, 72 SPC3_CMD_WRITE_FILEMARKS = SCMD_WRITE_FILE_MARK, 73 SPC3_CMD_WRITE_FILEMARKS6 = SCMD_WRITE_FILE_MARK, 74 SPC3_CMD_SYNCHRONIZE_BUFFER = SCMD_FLUSH_PRINT_BUF, 75 SPC3_CMD_SPACE = SCMD_SPACE, 76 SPC3_CMD_SPACE6 = SCMD_SPACE, 77 SPC3_CMD_INQUIRY = SCMD_INQUIRY, 78 SPC3_CMD_VERIFY = SCMD_VERIFY_G0, 79 SPC3_CMD_VERIFY6 = SCMD_VERIFY_G0, 80 SPC3_CMD_RECOVER_BUFFERED_DATA = SCMD_RECOVER_BUF, 81 SPC3_CMD_MODE_SELECT = SCMD_MODE_SELECT, 82 SPC3_CMD_MODE_SELECT6 = SCMD_MODE_SELECT, 83 SPC3_CMD_RESERVE = SCMD_RESERVE, 84 SPC3_CMD_RESERVE6 = SCMD_RESERVE, 85 SPC3_CMD_RESERVE_ELEMENT = SCMD_RESERVE, 86 SPC3_CMD_RESERVE_ELEMENT6 = SCMD_RESERVE, 87 SPC3_CMD_RELEASE = SCMD_RELEASE, 88 SPC3_CMD_RELEASE6 = SCMD_RELEASE, 89 SPC3_CMD_RELEASE_ELEMENT = SCMD_RELEASE, 90 SPC3_CMD_RELEASE_ELEMENT6 = SCMD_RELEASE, 91 SPC3_CMD_COPY = SCMD_COPY, 92 SPC3_CMD_ERASE = SCMD_ERASE, 93 SPC3_CMD_ERASE6 = SCMD_ERASE, 94 SPC3_CMD_MODE_SENSE = SCMD_MODE_SENSE, 95 SPC3_CMD_MODE_SENSE6 = SCMD_MODE_SENSE, 96 SPC3_CMD_START_STOP_UNIT = SCMD_START_STOP, 97 SPC3_CMD_LOAD_UNLOAD = SCMD_LOAD, 98 SPC3_CMD_SCAN = SCMD_START_STOP, 99 SPC3_CMD_STOP_PRINT = SCMD_STOP_PRINT, 100 SPC3_CMD_RECEIVE_DIAGNOSTIC_RESULTS = SCMD_GDIAG, 101 SPC3_CMD_SEND_DIAGNOSTIC = SCMD_SDIAG, 102 SPC3_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL = SCMD_DOORLOCK, 103 SPC3_CMD_VENDOR_20 = 0x20, 104 SPC3_CMD_VENDOR_21 = 0x21, 105 SPC3_CMD_VENDOR_22 = 0x22, 106 SPC3_CMD_VENDOR_23 = 0x23, 107 SPC3_CMD_SET_WINDOW = 0x24, 108 SPC3_CMD_READ_CAPACITY = SCMD_READ_CAPACITY, 109 SPC3_CMD_READ_CAPACITY10 = SCMD_READ_CAPACITY, 110 SPC3_CMD_READ_CARD_CAPACITY = SCMD_READ_CAPACITY, 111 SPC3_CMD_GET_WINDOW = SCMD_READ_CAPACITY, 112 SPC3_CMD_VENDOR_26 = 0x26, 113 SPC3_CMD_VENDOR_27 = 0x27, 114 SPC3_CMD_READ10 = SCMD_READ_G1, 115 SPC3_CMD_GET_MESSAGE10 = SCMD_READ_G1, 116 SPC3_CMD_READ_GENERATION = 0x29, 117 SPC3_CMD_WRITE10 = SCMD_WRITE_G1, 118 SPC3_CMD_SEND10 = SCMD_WRITE_G1, 119 SPC3_CMD_SEND_MESSAGE10 = SCMD_WRITE_G1, 120 SPC3_CMD_SEEK10 = SCMD_SEEK_G1, 121 SPC3_CMD_LOCATE = SCMD_LOCATE, 122 SPC3_CMD_LOCATE10 = SCMD_LOCATE, 123 SPC3_CMD_POSITION_TO_ELEMENT = SCMD_SEEK_G1, 124 SPC3_CMD_ERASE10 = 0x2c, 125 SPC3_CMD_READ_UPDATED_BLOCK = 0x2d, 126 SPC3_CMD_WRITE_AND_VERIFY = SCMD_WRITE_VERIFY, 127 SPC3_CMD_WRITE_AND_VERIFY10 = SCMD_WRITE_VERIFY, 128 SPC3_CMD_VERIFY10 = SCMD_VERIFY, 129 SPC3_CMD_SEARCH_DATA_HIGH = SCMD_SEARCH_HIGH, 130 SPC3_CMD_SEARCH_DATA_HIGH10 = SCMD_SEARCH_HIGH, 131 SPC3_CMD_SEARCH_DATA_EQUAL = SCMD_SEARCH_EQUAL, 132 SPC3_CMD_SEARCH_DATA_EQUAL10 = SCMD_SEARCH_EQUAL, 133 SPC3_CMD_OBJECT_POSITION = SCMD_SEARCH_EQUAL, 134 SPC3_CMD_SEARCH_DATA_LOW = SCMD_SEARCH_LOW, 135 SPC3_CMD_SEARCH_DATA_LOW10 = SCMD_SEARCH_LOW, 136 SPC3_CMD_SET_LIMITS = SCMD_SET_LIMITS, 137 SPC3_CMD_SET_LIMITS10 = SCMD_SET_LIMITS, 138 SPC3_CMD_PREFETCH = SCMD_READ_POSITION, 139 SPC3_CMD_PREFETCH10 = SCMD_READ_POSITION, 140 SPC3_CMD_READ_POSITION = SCMD_READ_POSITION, 141 SPC3_CMD_GET_DATA_BUFFER_STATUS = SCMD_READ_POSITION, 142 SPC3_CMD_SYNCHRONIZE_CACHE = SCMD_SYNCHRONIZE_CACHE, 143 SPC3_CMD_SYNCHRONIZE_CACHE10 = SCMD_SYNCHRONIZE_CACHE, 144 SPC3_CMD_LOCK_UNLOCK_CACHE = 0x36, 145 SPC3_CMD_READ_DEFECT_DATA = SCMD_READ_DEFECT_LIST, 146 SPC3_CMD_READ_DEFECT_DATA10 = SCMD_READ_DEFECT_LIST, 147 SPC3_CMD_INITIALIZE_ELEMENT_STATUS_WITH_RANGE = SCMD_READ_DEFECT_LIST, 148 SPC3_CMD_MEDIUM_SCAN = 0x38, 149 SPC3_CMD_COMPARE = SCMD_COMPARE, 150 SPC3_CMD_COPY_AND_VERIFY = SCMD_COPY_VERIFY, 151 SPC3_CMD_WRITE_BUFFER = SCMD_WRITE_BUFFER, 152 SPC3_CMD_READ_BUFFER = SCMD_READ_BUFFER, 153 SPC3_CMD_UPDATE_BLOCK = 0x3d, 154 SPC3_CMD_READ_LONG = SCMD_READ_LONG, 155 SPC3_CMD_READ_LONG10 = SCMD_READ_LONG, 156 SPC3_CMD_WRITE_LONG = SCMD_WRITE_LONG, 157 SPC3_CMD_WRITE_LONG10 = SCMD_WRITE_LONG, 158 SPC3_CMD_CHANGE_DEFINITION = 0x40, 159 SPC3_CMD_WRITE_SAME = 0x41, 160 SPC3_CMD_WRITE_SAME10 = 0x41, 161 SPC3_CMD_UNMAP = 0x42, 162 SPC3_CMD_UNMAP10 = 0x42, 163 SPC3_CMD_READ_SUBCHANNEL = SCMD_READ_SUBCHANNEL, 164 SPC3_CMD_READ_TOC = SCMD_READ_TOC, 165 SPC3_CMD_REPORT_DENSITY_SUPPORT = SCMD_REPORT_DENSITIES, 166 SPC3_CMD_READ_HEADER = SCMD_READ_HEADER, 167 SPC3_CMD_PLAY_AUDIO = SCMD_PLAYAUDIO10, 168 SPC3_CMD_PLAY_AUDIO10 = SCMD_PLAYAUDIO10, 169 SPC3_CMD_GET_CONFIGURATION = SCMD_GET_CONFIGURATION, 170 SPC3_CMD_PLAY_AUDIO_MSF = SCMD_PLAYAUDIO_MSF, 171 /* Not defined by SPC-3 */ 172 SPC3_CMD_PLAY_AUDIO_TI = SCMD_PLAYAUDIO_TI, 173 SPC3_CMD_PLAY_TRACK_REL = SCMD_PLAYTRACK_REL10, 174 SPC3_CMD_PLAY_TRACK_REL10 = SCMD_PLAYTRACK_REL10, 175 SPC3_CMD_GET_EVENT_STATUS_NOTIFICATION = 0x4a, 176 SPC3_CMD_PAUSE_RESUME = SCMD_PAUSE_RESUME, 177 SPC3_CMD_LOG_SELECT = SCMD_LOG_SELECT_G1, 178 SPC3_CMD_LOG_SENSE = SCMD_LOG_SENSE_G1, 179 SPC3_CMD_STOP_PLAY_SCAN = 0x4e, 180 SPC3_CMD_XDWRITE = 0x50, 181 SPC3_CMD_XDWRITE10 = 0x50, 182 SPC3_CMD_XPWRITE = 0x51, 183 SPC3_CMD_XPWRITE10 = 0x51, 184 SPC3_CMD_READ_DISC_INFORMATION = 0x51, 185 SPC3_CMD_XDREAD = 0x52, 186 SPC3_CMD_XDREAD10 = 0x52, 187 SPC3_CMD_READ_TRACK_INFORMATION = 0x52, 188 SPC3_CMD_RESERVE_TRACK = 0x53, 189 SPC3_CMD_SEND_OPC_INFORMATION = 0x54, 190 SPC3_CMD_MODE_SELECT10 = SCMD_MODE_SELECT_G1, 191 SPC3_CMD_RESERVE10 = SCMD_RESERVE_G1, 192 SPC3_CMD_RESERVE_ELEMENT10 = SCMD_RESERVE_G1, 193 SPC3_CMD_RELEASE10 = SCMD_RELEASE_G1, 194 SPC3_CMD_RELEASE_ELEMENT10 = SCMD_RELEASE_G1, 195 SPC3_CMD_REPAIR_TRACK = 0x58, 196 SPC3_CMD_MODE_SENSE10 = SCMD_MODE_SENSE_G1, 197 SPC3_CMD_CLOSE_TRACK_SESSION = 0x5b, 198 SPC3_CMD_READ_BUFFER_CAPACITY = 0x5c, 199 SPC3_CMD_SEND_CUE_SHEET = 0x5d, 200 SPC3_CMD_PERSISTENT_RESERVE_IN = SCMD_PERSISTENT_RESERVE_IN, 201 SPC3_CMD_PERSISTENT_RESERVE_OUT = SCMD_PERSISTENT_RESERVE_OUT, 202 SPC3_CMD_VARIABLE_LENGTH = SCMD_VAR_LEN, 203 SPC3_CMD_XDWRITE_EXTENDED = SCMD_WRITE_FILE_MARK_G4, 204 SPC3_CMD_XDWRITE_EXTENDED16 = SCMD_WRITE_FILE_MARK_G4, 205 SPC3_CMD_WRITE_FILEMARKS16 = SCMD_WRITE_FILE_MARK_G4, 206 SPC3_CMD_REBUILD = SCMD_READ_REVERSE_G4, 207 SPC3_CMD_REBUILD16 = SCMD_READ_REVERSE_G4, 208 SPC3_CMD_READ_REVERSE16 = SCMD_READ_REVERSE_G4, 209 SPC3_CMD_REGENERATE = 0x82, 210 SPC3_CMD_REGENERATE16 = 0x82, 211 SPC3_CMD_EXTENDED_COPY = SCMD_EXTENDED_COPY, 212 SPC3_CMD_RECEIVE_COPY_RESULTS = 0x84, 213 SPC3_CMD_ATA_COMMAND_PASS_THROUGH = 0x85, 214 SPC3_CMD_ATA_COMMAND_PASS_THROUGH16 = 0x85, 215 SPC3_CMD_ACCESS_CONTROL_IN = 0x86, 216 SPC3_CMD_ACCESS_CONTROL_OUT = 0x87, 217 SPC3_CMD_READ16 = SCMD_READ_G4, 218 SPC3_CMD_WRITE16 = SCMD_WRITE_G4, 219 SPC3_CMD_READ_ATTRIBUTE = SCMD_READ_ATTRIBUTE, 220 SPC3_CMD_WRITE_ATTRIBUTE = SCMD_WRITE_ATTRIBUTE, 221 SPC3_CMD_WRITE_AND_VERIFY16 = 0x8e, 222 SPC3_CMD_VERIFY16 = SCMD_VERIFY_G4, 223 SPC3_CMD_PREFETCH16 = 0x90, 224 SPC3_CMD_SYNCHRONIZE_CACHE16 = SCMD_SPACE_G4, 225 SPC3_CMD_SPACE16 = SCMD_SPACE_G4, 226 SPC3_CMD_LOCK_UNLOCK_CACHE16 = 0x92, 227 SPC3_CMD_LOCATE16 = 0x92, 228 SPC3_CMD_WRITE_SAME16 = 0x93, 229 SPC3_CMD_ERASE16 = 0x93, 230 SPC3_CMD_SERVICE_ACTION_IN = SCMD_SVC_ACTION_IN_G4, 231 SPC3_CMD_SERVICE_ACTION_IN16 = SCMD_SVC_ACTION_IN_G4, 232 SPC3_CMD_SERVICE_ACTION_OUT = SCMD_SVC_ACTION_OUT_G4, 233 SPC3_CMD_SERVICE_ACTION_OUT16 = SCMD_SVC_ACTION_OUT_G4, 234 SPC3_CMD_REPORT_LUNS = SCMD_REPORT_LUNS, 235 SPC3_CMD_BLANK = 0xa1, 236 SPC3_CMD_ATA_COMMAND_PASS_THROUGH12 = 0xa1, 237 SPC3_CMD_SECURITY_PROTO_IN = SCMD_SECURITY_PROTO_IN, 238 SPC3_CMD_MAINTENANCE_IN = SCMD_MAINTENANCE_IN, 239 SPC3_CMD_SEND_KEY = SCMD_MAINTENANCE_IN, 240 SPC3_CMD_MAINTENANCE_OUT = SCMD_MAINTENANCE_OUT, 241 SPC3_CMD_REPORT_KEY = SCMD_MAINTENANCE_OUT, 242 SPC3_CMD_MOVE_MEDIUM = SCMD_PLAYAUDIO12, 243 SPC3_CMD_PLAY_AUDIO12 = SCMD_PLAYAUDIO12, 244 SPC3_CMD_EXCHANGE_MEDIUM = 0xa6, 245 SPC3_CMD_LOAD_UNLOAD_CD = 0xa6, 246 SPC3_CMD_MOVE_MEDIUM_ATTACHED = 0xa7, 247 SPC3_CMD_SET_READ_AHEAD = 0xa7, 248 SPC3_CMD_READ12 = SCMD_READ_G5, 249 SPC3_CMD_GET_MESSAGE12 = SCMD_READ_G5, 250 SPC3_CMD_SERVICE_ACTION_OUT12 = SCMD_SVC_ACTION_OUT_G5, 251 SPC3_CMD_PLAY_TRACK_REL12 = SCMD_PLAYTRACK_REL12, 252 SPC3_CMD_WRITE12 = SCMD_WRITE_G5, 253 SPC3_CMD_SEND_MESSAGE12 = SCMD_WRITE_G5, 254 SPC3_CMD_SERVICE_ACTION_IN12 = SCMD_SVC_ACTION_IN_G5, 255 SPC3_CMD_ERASE12 = SCMD_GET_PERFORMANCE, 256 SPC3_CMD_GET_PERFORMANCE = SCMD_GET_PERFORMANCE, 257 SPC3_CMD_READ_DVD_STRUCTURE = 0xad, 258 SPC3_CMD_WRITE_AND_VERIFY12 = 0xae, 259 SPC3_CMD_VERIFY12 = SCMD_VERIFY_G5, 260 SPC3_CMD_SEARCH_DATA_HIGH12 = 0xb0, 261 SPC3_CMD_SEARCH_DATA_EQUAL12 = 0xb1, 262 SPC3_CMD_SEARCH_DATA_LOW12 = 0xb2, 263 SPC3_CMD_SET_LIMITS12 = 0xb3, 264 SPC3_CMD_READ_ELEMENT_STATUS_ATTACHED = 0xb4, 265 SPC3_CMD_REQUEST_VOLUME_ELEMENT_ADDRESS = 0xb5, 266 SPC3_CMD_SEND_VOLUME_TAG = 0xb6, 267 SPC3_CMD_SET_STREAMING = 0xb6, 268 SPC3_CMD_READ_DEFECT_DATA12 = 0xb7, 269 SPC3_CMD_READ_ELEMENT_STATUS = 0xb8, 270 SPC3_CMD_READ_CD_MSF = 0xb9, 271 SPC3_CMD_REDUNDANCY_GROUP_IN = 0xba, 272 SPC3_CMD_SCAN12 = 0xba, 273 SPC3_CMD_REDUNDANCY_GROUP_OUT = SCMD_SET_CDROM_SPEED, 274 SPC3_CMD_SET_CD_SPEED = SCMD_SET_CDROM_SPEED, 275 SPC3_CMD_SPARE_IN = 0xbc, 276 SPC3_CMD_SPARE_OUT = 0xbd, 277 SPC3_CMD_MECHANISM_STATUS = 0xbd, 278 SPC3_CMD_VOLUME_SET_IN = SCMD_READ_CD, 279 SPC3_CMD_READ_CD = SCMD_READ_CD, 280 SPC3_CMD_VOLUME_SET_OUT = 0xbf, 281 SPC3_CMD_SEND_DVD_STRUCTURE = 0xbf 282 } spc3_cmd_t; 283 284 typedef enum spc3_dev_type { 285 SPC3_DEVTYPE_DIRECT = 0x00, 286 SPC3_DEVTYPE_SEQUENTIAL = 0x01, 287 SPC3_DEVTYPE_PRINTER = 0x02, 288 SPC3_DEVTYPE_PROCESSOR = 0x03, 289 SPC3_DEVTYPE_WORM = 0x04, 290 SPC3_DEVTYPE_MMC = 0x05, 291 SPC3_DEVTYPE_SCANNER = 0x06, 292 SPC3_DEVTYPE_OPTICAL = 0x07, 293 SPC3_DEVTYPE_CHANGER = 0x08, 294 SPC3_DEVTYPE_COMM = 0x09, 295 SPC3_DEVTYPE_ARRAY_CONTROLLER = 0x0c, 296 SPC3_DEVTYPE_SES = 0x0d, 297 SPC3_DEVTYPE_RBC = 0xe, 298 SPC3_DEVTYPE_OCRW = 0xf, 299 SPC3_DEVTYPE_BCC = 0x10, 300 SPC3_DEVTYPE_OSD = 0x11, 301 SPC3_DEVTYPE_ADC = 0x12 302 } spc3_dev_type_t; 303 304 /* 305 * SAM-4 5.3.1, Table 25 306 */ 307 typedef enum sam4_status { 308 SAM4_STATUS_GOOD = 0x0, 309 SAM4_STATUS_CHECK_CONDITION = 0x2, 310 SAM4_STATUS_CONDITION_MET = 0x4, 311 SAM4_STATUS_BUSY = 0x8, 312 SAM4_STATUS_RESERVATION_CONFLICT = 0x18, 313 SAM4_STATUS_TASK_SET_FULL = 0x28, 314 SAM4_STATUS_ACA_ACTIVE = 0x30, 315 SAM4_STATUS_TASK_ABORTED = 0x40 316 } sam4_status_t; 317 318 #pragma pack(1) 319 320 typedef union spc3_control { 321 struct { 322 DECL_BITFIELD5( 323 c_link :1, 324 c_flag :1, 325 c_naca :1, 326 _reserved1 :3, 327 c_vs_6 :2); 328 } c_bits; 329 uint8_t c_byte; 330 } spc3_control_t; 331 332 /* 333 * SPC-3 6.2.1 CHANGE ALIASES 334 */ 335 typedef struct spc3_change_aliases_cdb { 336 uint8_t cac_opcode; 337 DECL_BITFIELD2( 338 cac_service_action :5, 339 _reserved1 :3); 340 uint8_t _reserved2[4]; 341 uint32_t cac_parameter_list_length; 342 uint8_t _reserved3; 343 spc3_control_t cac_control; 344 } spc3_change_aliases_cdb_t; 345 346 typedef struct spc3_alias_entry { 347 uint64_t ae_alias_value; 348 uint8_t ae_protocol_identifier; 349 uint8_t _reserved1[2]; 350 uint8_t ae_format_code; 351 uint8_t _reserved2[2]; 352 uint16_t ae_designation_length; 353 uint8_t ae_designation[1]; /* Flexible */ 354 } spc3_alias_entry_t; 355 356 typedef struct spc3_change_aliases_param_list { 357 uint32_t capl_parameter_data_length; 358 uint8_t _reserved1[4]; 359 spc3_alias_entry_t capl_alias_entries[1]; /* Flexible */ 360 } spc3_change_aliases_param_list_t; 361 362 /* 363 * SPC-3 6.4.1 INQUIRY 364 */ 365 typedef struct spc3_inquiry_cdb { 366 uint8_t ic_opcode; 367 DECL_BITFIELD2( 368 ic_evpd :1, 369 _reserved1 :7); 370 uint8_t ic_page_code; 371 uint16_t ic_allocation_length; 372 spc3_control_t ic_control; 373 } spc3_inquiry_cdb_t; 374 375 typedef struct spc3_inquiry_data { 376 DECL_BITFIELD2( 377 id_peripheral_device_type :5, 378 id_peripheral_qualifier :3); 379 DECL_BITFIELD2( 380 _reserved1 :7, 381 id_rmb :1); 382 uint8_t id_version; 383 DECL_BITFIELD4( 384 id_response_data_format :4, 385 id_hisup :1, 386 id_naca :1, 387 _reserved2 :2); 388 uint8_t additional_length; 389 DECL_BITFIELD6( 390 id_protect :1, 391 _reserved3 :2, 392 id_3pc :1, 393 id_tpgs :2, 394 id_acc :1, 395 id_sccs :1); 396 DECL_BITFIELD7( 397 id_addr16 :1, 398 _reserved4 :2, 399 id_mchanger :1, 400 id_multip :1, 401 id_vs_6_5 :1, 402 id_enc_serv :1, 403 id_b_que :1); 404 DECL_BITFIELD7( 405 id_vs_7_0 :1, 406 id_cmd_que :1, 407 _reserved5 :1, 408 id_linked :1, 409 id_sync :1, 410 id_wbus16 :1, 411 _reserved6 :2); 412 char id_vendor_id[8]; 413 char id_product_id[16]; 414 char id_product_revision[4]; 415 uint8_t id_vs_36[20]; 416 DECL_BITFIELD4( 417 id_ius :1, 418 id_qas :1, 419 id_clocking :2, 420 _reserved7 :4); 421 uint8_t _reserved8; 422 uint16_t id_version_descriptors[8]; 423 uint8_t _reserved9[22]; 424 uint8_t id_vs_96[1]; /* Flexible */ 425 } spc3_inquiry_data_t; 426 427 /* 428 * SPC-3 6.5 LOG SELECT 429 */ 430 typedef enum spc3_log_page_control { 431 SPC3_LOG_PC_CUR_THRESHOLD = 0, 432 SPC3_LOG_PC_CUR_CUMULATIVE = 1, 433 SPC3_LOG_PC_DEF_THRESHOLD = 2, 434 SPC3_LOG_PC_DEF_CUMULATIVE = 3 435 } spc3_log_page_control_t; 436 437 typedef struct spc3_log_select_cdb { 438 uint8_t lsc_opcode; 439 DECL_BITFIELD3( 440 lsc_sp :1, 441 lsc_pcr :1, 442 _reserved1 :6); 443 DECL_BITFIELD2( 444 _reserved2 :6, 445 lsc_pc :2); 446 uint8_t _reserved3[4]; 447 uint16_t lsc_parameter_list_length; 448 spc3_control_t lsc_control; 449 } spc3_log_select_cdb_t; 450 451 /* 452 * SPC-3 6.6 LOG SENSE 453 */ 454 typedef struct spc3_log_sense_cdb { 455 uint8_t lsc_opcode; 456 DECL_BITFIELD3( 457 lsc_sp :1, 458 lsc_ppc :1, 459 _reserved1 :6); 460 DECL_BITFIELD2( 461 lsc_page_code :6, 462 lsc_pc :2); 463 uint8_t _reserved2[2]; 464 uint16_t lsc_parameter_ptr; 465 uint16_t lsc_allocation_length; 466 spc3_control_t lsc_control; 467 } spc3_log_sense_cdb_t; 468 469 typedef enum spc3_mode_page_control { 470 SPC3_MODE_PC_CURRENT = 0, 471 SPC3_MODE_PC_CHANGEABLE = 1, 472 SPC3_MODE_PC_DEFAULT = 2, 473 SPC3_MODE_PC_SAVED = 3 474 } spc3_mode_page_control_t; 475 476 typedef struct spc3_mode_param_header6 { 477 uint8_t mph_mode_data_length; 478 uint8_t mph_medium_type; 479 uint8_t mph_device_param; 480 uint8_t mph_block_descriptor_length; 481 } spc3_mode_param_header6_t; 482 483 typedef spc3_mode_param_header6_t spc3_mode_param_header_t; 484 485 typedef struct spc3_mode_param_header10 { 486 uint16_t mph_mode_data_length; 487 uint8_t mph_medium_type; 488 uint8_t mph_device_param; 489 DECL_BITFIELD2( 490 mph_longlba :1, 491 _reserved1 :7); 492 uint8_t _reserved2; 493 uint16_t mph_block_descriptor_length; 494 } spc3_mode_param_header10_t; 495 496 typedef struct spc3_mode_param_block_descriptor { 497 uint8_t mpbd_density_code; 498 uint8_t mpbd_nblocks[3]; 499 uint8_t _reserved1; 500 uint8_t mpbd_block_length[3]; 501 } spc3_mode_param_block_descriptor_t; 502 503 typedef struct spc3_mode_page_0 { 504 DECL_BITFIELD3( 505 mp0_page_code :6, 506 mp0_spf :1, 507 mp0_ps :1); 508 uint8_t mp0_page_length; 509 uint8_t mp0_mode_parameters[1]; /* Flexible */ 510 } spc3_mode_page_0_t; 511 512 typedef struct spc3_mode_subpage { 513 DECL_BITFIELD3( 514 ms_page_code :6, 515 ms_spf :1, 516 ms_ps :1); 517 uint8_t ms_subpage_code; 518 uint16_t ms_page_length; 519 uint8_t ms_mode_parameters[1]; /* Flexible */ 520 } spc3_mode_subpage_t; 521 522 /* 523 * SPC-3 7.4.6 Table 246 - TST field 524 */ 525 typedef enum spc3_mode_task_set { 526 SPC3_MODE_TST_ONE = 0, 527 SPC3_MODE_TST_SEPARATE = 1 528 } spc3_mode_task_set_t; 529 530 /* 531 * SPC-3 7.4.6 Table 247 - Queue Algorithm Modifier field 532 */ 533 typedef enum spc3_mode_queue_alg_mod { 534 SPC3_MODE_QAM_RESTRICTED = 0, 535 SPC3_MODE_QAM_UNRESTRICTED = 1 536 } spc3_mode_queue_alg_mod_t; 537 538 /* 539 * SPC-3 7.4.6 Table 245 540 */ 541 typedef struct spc3_mode_params_control { 542 DECL_BITFIELD6( 543 mpc_rlec :1, 544 mpc_gltsd :1, 545 mpc_d_sense :1, 546 _reserved1 :1, 547 mpc_tmf_only :1, 548 mpc_tst :3); 549 DECL_BITFIELD4( 550 _reserved2 :1, 551 mpc_q_err :1, 552 _reserved3 :1, 553 mpc_queue_alg_mod :4); 554 DECL_BITFIELD5( 555 _reserved4 :3, 556 mpc_swp :1, 557 mpc_ua_intlck_ctrl :2, 558 mpc_rac :1, 559 mpc_vs_4_7 :1); 560 DECL_BITFIELD4( 561 mpc_autoload_mode :3, 562 _reserved5 :3, 563 mpc_tas :1, 564 mpc_ato :1); 565 uint8_t _reserved6[2]; 566 uint16_t mpc_busy_timeout_period; 567 uint16_t mpc_ext_selftest_completion_time; 568 } spc3_mode_page_params_control_t; 569 570 /* 571 * SPC-3 7.4.7 Control Extension mode page 572 */ 573 typedef struct spc3_mode_params_control_ext { 574 DECL_BITFIELD4( 575 mpce_ialuae :1, 576 mpce_scsip :1, 577 mpce_tcmos :1, 578 _reserved1 :5); 579 DECL_BITFIELD2( 580 mpce_initial_priority :4, 581 _reserved2 :4); 582 uint8_t _reserved3[26]; 583 } spc3_mode_params_control_ext_t; 584 585 /* 586 * SPC-3 7.4.8 Disconnect-Reconnect mode page 587 */ 588 typedef struct spc3_mode_params_dc_rc { 589 uint8_t mpdr_buffer_full_ratio; 590 uint8_t mpdr_buffer_empty_ratio; 591 uint16_t mpdr_bus_inactivity_limit; 592 uint16_t mpdr_disconnect_time_limit; 593 uint16_t mpdr_connect_time_limit; 594 uint16_t mpdr_max_burst_size; 595 DECL_BITFIELD4( 596 mpdr_dtdc :3, 597 mpdr_di_mm :1, 598 mpdr_fair_arbitration :3, 599 mpdr_emdp :1); 600 uint8_t _reserved1; 601 uint16_t mpdr_first_burst_size; 602 } spc3_mode_params_dc_rc_t; 603 604 typedef enum spc3_mode_mrie { 605 SPC3_MODE_MRIE_NONE = 0, 606 SPC3_MODE_MRIE_ASYNC = 1, 607 SPC3_MODE_MRIE_UNIT_ATTN = 2, 608 SPC3_MODE_MRIE_COND_REC_ERR = 3, 609 SPC3_MODE_MRIE_UNCOND_REC_ERR = 4, 610 SPC3_MODE_MRIE_NO_SENSE = 5, 611 SPC3_MODE_MRIE_REQUEST = 6 612 } spc3_mode_mrie_t; 613 614 /* 615 * SPC-3 7.4.11 Informational Exceptions Control mode page 616 */ 617 typedef struct spc3_mode_params_iec { 618 DECL_BITFIELD8( 619 mpi_log_err :1, 620 _reserved1 :1, 621 mpi_test :1, 622 mpi_d_excpt :1, 623 mpi_e_wasc :1, 624 mpi_ebf :1, 625 _reserved2 :1, 626 mpi_perf :1); 627 DECL_BITFIELD2( 628 mpi_mrie :4, 629 _reserved3 :4); 630 uint32_t mpi_interval_timer; 631 uint32_t mpi_report_count; 632 } spc3_mode_params_iec_t; 633 634 /* 635 * SPC-3 7.4.12 Power Condition mode page 636 */ 637 typedef struct spc3_mode_params_pc { 638 uint8_t _reserved1; 639 DECL_BITFIELD3( 640 mpp_standby :1, 641 mpp_idle :1, 642 _reserved2 :6); 643 uint32_t mpp_idle_condition_timer; 644 uint32_t mpp_standby_condition_timer; 645 } spc3_mode_params_pc_t; 646 647 /* 648 * SPC-3 6.7 MODE SELECT(6) 649 */ 650 typedef struct spc3_mode_select6_cdb { 651 uint8_t msc_opcode; 652 DECL_BITFIELD4( 653 msc_sp :1, 654 _reserved1 :3, 655 msc_pf :1, 656 _reserved2 :3); 657 uint8_t _reserved3[2]; 658 uint8_t msc_parameter_list_length; 659 spc3_control_t msc_control; 660 } spc3_mode_select6_cdb_t; 661 662 typedef spc3_mode_select6_cdb_t spc3_mode_select_cdb_t; 663 664 /* 665 * SPC-3 6.8 MODE SELECT(10) 666 */ 667 typedef struct spc3_mode_select10_cdb { 668 uint8_t msc_opcode; 669 DECL_BITFIELD4( 670 msc_sp :1, 671 _reserved1 :3, 672 msc_pf :1, 673 _reserved2 :3); 674 uint8_t _reserved3[5]; 675 uint16_t msc_parameter_list_length; 676 spc3_control_t msc_control; 677 } spc3_mode_select10_cdb_t; 678 679 /* 680 * SPC-3 6.9 MODE SENSE(6) 681 */ 682 typedef struct spc3_mode_sense6_cdb { 683 uint8_t msc_opcode; 684 DECL_BITFIELD3( 685 _reserved1 :3, 686 msc_dbd :1, 687 _reserved2 :4); 688 DECL_BITFIELD2( 689 msc_page_code :6, 690 msc_pc :2); 691 uint8_t msc_subpage_code; 692 uint8_t msc_allocation_length; 693 spc3_control_t msc_control; 694 } spc3_mode_sense6_cdb_t; 695 696 typedef spc3_mode_sense6_cdb_t spc3_mode_sense_cdb_t; 697 698 /* 699 * SPC-3 6.10 MODE SENSE(10) 700 */ 701 typedef struct spc3_mode_sense10_cdb { 702 uint8_t msc_opcode; 703 DECL_BITFIELD4( 704 _reserved1 :3, 705 msc_dbd :1, 706 msc_llbaa :1, 707 _reserved2 :3); 708 DECL_BITFIELD2( 709 msc_page_code :6, 710 msc_pc :2); 711 uint8_t msc_subpage_code; 712 uint8_t _reserved3[3]; 713 uint16_t msc_allocation_length; 714 spc3_control_t msc_control; 715 } spc3_mode_sense10_cdb_t; 716 717 /* 718 * SPC-3 6.11 PERSISTENT RESERVE IN 719 */ 720 typedef enum spc3_persistent_reserve_in_sac { 721 SPC3_PRI_SAC_READ_KEYS = 0, 722 SPC3_PRI_SAC_READ_RESERVATION = 1, 723 SPC3_PRI_SAC_REPORT_CAPABILITIES = 2, 724 SPC3_PRI_SAC_READ_FULL_STATUS = 3 725 } spc3_persistent_reserve_in_sac_t; 726 727 typedef struct spc3_persistent_reserve_in_param_rk { 728 uint32_t pripr_pr_generation; 729 uint32_t pripr_additional_length; 730 uint64_t pripr_keys[1]; /* Flexible */ 731 } spc3_persistent_reserve_in_param_rk_t; 732 733 typedef enum spc3_persistent_reserve_type { 734 SPC3_PR_TYPE_WREXCL = 1, 735 SPC3_PR_TYPE_EXCL = 3, 736 SPC3_PR_WREXCL_REG_ONLY = 5, 737 SPC3_PR_EXCL_REG_ONLY = 6, 738 SPC3_PR_WREXCL_ALL_REG = 7, 739 SPC3_PR_EXCL_ALL_REG = 8 740 } spc3_persistent_reserve_type_t; 741 742 typedef struct spc3_persistent_reserve_in_param_rr { 743 uint32_t pripr_pr_generation; 744 uint32_t pripr_additional_length; 745 uint64_t pripr_key; 746 uint8_t _reserved1[4]; 747 uint8_t _reserved2; 748 DECL_BITFIELD2( 749 pripr_type :4, 750 pripr_scope :4); 751 uint8_t _reserved3[2]; 752 } spc3_persistent_reserve_in_param_rr_t; 753 754 typedef struct spc3_persistent_reserve_in_param_rc { 755 uint16_t pripr_length; 756 DECL_BITFIELD6( 757 pripr_ptpl_c :1, 758 _reserved1 :1, 759 pripr_atp_c :1, 760 pripr_sip_c :1, 761 pripr_crh :1, 762 _reserved2 :3); 763 DECL_BITFIELD3( 764 pripr_ptpl_a :1, 765 _reserved3 :6, 766 pripr_tmv :1); 767 DECL_BITFIELD8( 768 _reserved4 :1, 769 pripr_wr_ex :1, 770 _reserved5 :1, 771 pripr_ex_ac :1, 772 _reserved6 :1, 773 pripr_wr_ex_ro :1, 774 pripr_ex_ac_ro :1, 775 pripr_wr_ex_ar :1); 776 DECL_BITFIELD2( 777 pripr_ex_ac_ar :1, 778 _reserved7 :7); 779 uint8_t _reserved8[2]; 780 } spc3_persistent_reserve_in_param_rc_t; 781 782 typedef struct spc3_persistent_reserve_full_status { 783 uint64_t prfs_key; 784 uint8_t _reserved1[4]; 785 DECL_BITFIELD3( 786 prfs_r_holder :1, 787 prfs_all_tg_pt :1, 788 _reserved2 :6); 789 DECL_BITFIELD2( 790 prfs_type :4, 791 prfs_scope :4); 792 uint8_t _reserved3[4]; 793 uint16_t prfs_relative_target_port_identifier; 794 uint32_t prfs_additional_descriptor_length; 795 uint8_t prfs_transport_id[1]; /* Flexible */ 796 } spc3_persistent_reserve_full_status_t; 797 798 typedef struct spc3_persistent_reserve_in_param_rfs { 799 uint32_t pripr_pr_generation; 800 uint32_t pripr_additional_length; 801 uint8_t pripr_status_descriptors[1]; /* Flexible */ 802 } spc3_persistent_reserve_in_param_rfs_t; 803 804 typedef struct spc3_persistent_reserve_in_cdb { 805 uint8_t pric_opcode; 806 DECL_BITFIELD2( 807 pric_service_action :5, 808 _reserved1 :3); 809 uint8_t _reserved2[5]; 810 uint16_t pric_allocation_length; 811 spc3_control_t pric_control; 812 } spc3_persistent_reserve_in_cdb_t; 813 814 /* 815 * SPC-3 6.16 READ MEDIA SERIAL NUMBER 816 */ 817 typedef struct spc3_read_media_serial_number_cdb { 818 uint8_t rmsnc_opcode; 819 DECL_BITFIELD2( 820 rmsnc_service_action :5, 821 _reserved1 :3); 822 uint8_t _reserved2[4]; 823 uint32_t rmsnc_allocation_length; 824 uint8_t _reserved3; 825 spc3_control_t rmsnc_control; 826 } spc3_read_media_serial_number_cdb_t; 827 828 typedef struct spc3_read_media_serial_number_data { 829 uint32_t msnd_length; 830 uint8_t msnd_serial_number[1]; /* Flexible */ 831 } spc3_read_media_serial_number_data_t; 832 833 /* 834 * SPC-3 6.18 RECEIVE DIAGNOSTIC RESULTS 835 */ 836 typedef struct spc3_receive_diagnostic_results_cdb { 837 uint8_t rdrc_opcode; 838 DECL_BITFIELD2( 839 rdrc_pcv :1, 840 _reserved1 :7); 841 uint8_t rdrc_page_code; 842 uint16_t rdrc_allocation_length; 843 spc3_control_t rdrc_control; 844 } spc3_receive_diagnostic_results_cdb_t; 845 846 /* 847 * SPC-3 Diagnostic page format (Table 194, 7.1.1) 848 */ 849 typedef struct spc3_diag_page_impl { 850 uint8_t sdpi_page_code; 851 uint8_t sdpi_specific; 852 uint16_t sdpi_page_length; 853 uint8_t sdpi_data[1]; 854 } spc3_diag_page_impl_t; 855 856 /* 857 * SPC-3 Supported diagnostic pages (Table 196, 7.1.2) 858 */ 859 typedef struct spc3_supported_diag_page_impl { 860 uint8_t ssdpi_page_code; 861 uint8_t _reserved1; 862 uint16_t ssdpi_page_length; 863 uint8_t ssdpi_page_list[1]; 864 } spc3_supported_diag_page_impl_t; 865 866 /* 867 * SPC-3 6.21 REPORT LUNS 868 */ 869 typedef enum spc3_report_luns_select_report { 870 SPC3_RL_SR_ADDRESSING = 0, 871 SPC3_RL_SR_WELLKNOWN = 1, 872 SPC3_RL_SR_ALL = 2 873 } spc3_report_luns_select_report_t; 874 875 typedef struct spc3_report_luns_cdb { 876 uint8_t rlc_opcode; 877 uint8_t _reserved1; 878 uint8_t rlc_select_report; 879 uint8_t _reserved2[3]; 880 uint32_t rlc_allocation_length; 881 uint8_t _reserved3; 882 spc3_control_t rlc_control; 883 } spc3_report_luns_cdb_t; 884 885 typedef struct spc3_report_luns_data { 886 uint32_t rld_lun_list_length; 887 uint8_t _reserved1[4]; 888 uint64_t rld_luns[1]; /* Flexible */ 889 } spc3_report_luns_data_t; 890 891 /* 892 * SPC-3 6.27 REQUEST SENSE 893 */ 894 typedef struct spc3_request_sense_cdb { 895 uint8_t rsc_opcode; 896 DECL_BITFIELD2( 897 rsc_desc :1, 898 _reserved1 :7); 899 uint8_t _reserved2[2]; 900 uint8_t rsc_allocation_length; 901 spc3_control_t rsc_control; 902 } spc3_request_sense_cdb_t; 903 904 /* 905 * SPC-3 6.28 SEND DIAGNOSTIC 906 */ 907 typedef struct spc3_send_diagnostic_cdb { 908 uint8_t sdc_opcode; 909 DECL_BITFIELD6( 910 sdc_unit_off_l :1, 911 sdc_dev_off_l :1, 912 sdc_self_test :1, 913 _reserved1 :1, 914 sdc_pf :1, 915 sdc_selftest_code :3); 916 uint8_t _reserved2; 917 uint16_t sdc_parameter_list_length; 918 spc3_control_t sdc_control; 919 } spc3_send_diagnostic_cdb_t; 920 921 /* 922 * SPC-3 6.33 TEST UNIT READY 923 */ 924 typedef struct spc3_test_unit_ready_cdb { 925 uint8_t tur_opcode; 926 uint8_t _reserved1[4]; 927 spc3_control_t tur_control; 928 } spc3_test_unit_ready_cdb_t; 929 930 /* 931 * SPC-3 6.36 WRITE BUFFER 932 */ 933 typedef struct spc3_write_buffer_cdb { 934 uint8_t wbc_opcode; 935 DECL_BITFIELD2( 936 wbc_mode :5, 937 _reserved :3); 938 uint8_t wbc_bufferid; 939 uint8_t wbc_buffer_offset[3]; 940 uint8_t wbc_parameter_list_len[3]; 941 spc3_control_t wbc_control; 942 } spc3_write_buffer_cdb_t; 943 944 typedef enum spc3_write_buffer_mode { 945 SPC3_WB_MODE_COMB_HDR_DATA = 0x00, 946 SPC3_WB_MODE_VENDOR_SPECIFIC = 0x01, 947 SPC3_WB_MODE_DATA = 0x02, 948 SPC3_WB_MODE_DL_UCODE = 0x04, 949 SPC3_WB_MODE_DL_UCODE_SAVE = 0x05, 950 SPC3_WB_MODE_DL_UCODE_OFFS = 0x06, 951 SPC3_WB_MODE_DL_UCODE_OFFS_SAVE = 0x07, 952 SPC3_WB_MODE_ECHO_BUF = 0x0a, 953 SPC3_WB_MODE_DL_UCODE_OFFS_DEFER = 0x0e, 954 SPC3_WB_MODE_ACTIVATE_DEFERRED_UCODE = 0x0f, 955 SPC3_WB_MODE_ENABLE_EXPANDER_ECHO_BUF = 0x1a, 956 SPC3_WB_MODE_DISABLE_EXPANDER = 0x1b, 957 SPC3_WB_MODE_DL_APP_LOG = 0x1c 958 } spc3_write_buffer_mode_t; 959 960 typedef struct spc3_write_buffer_log { 961 uint8_t wbl_vendor[8]; 962 uint16_t wbl_error_type; 963 uint16_t _reserved1; 964 uint8_t wbl_timestamp[6]; 965 uint16_t _reserved2; 966 DECL_BITFIELD2( 967 _reserved3 :4, 968 wbl_codeset :4); 969 uint8_t wbl_error_location_fmt; 970 uint16_t wbl_error_location_len; 971 uint16_t wbl_client_error_history_len; 972 uint32_t wbl_data[1]; 973 } spc3_write_buffer_log_t; 974 975 typedef enum sp3_write_buffer_error_type { 976 SPC3_WB_ERROR_NONE = 0x0000, 977 SPC3_WB_ERROR_UNKNOWN = 0x0001, 978 SPC3_WB_ERROR_DATA_CORRUPT = 0x0002, 979 SPC3_WB_ERROR_PERMANENT = 0x0003, 980 SPC3_WB_ERROR_SERVICETARGET_FAILURE = 0x0004 981 } spc3_write_buffer_error_type_t; 982 983 typedef enum spc3_write_buffer_codeset { 984 SPC3_WB_CODESET_RESERVED = 0x00, 985 SPC3_WB_CODESET_BIN = 0x01, 986 SPC3_WB_CODESET_ASCII = 0x02, 987 SPC3_WB_CODESET_UTF8 = 0x03 988 } spc3_write_buffer_codeset_t; 989 990 typedef enum spc_3_write_buffer_error_location { 991 SPC3_WB_ERROR_LOCATION_FMT_NONE = 0x00, 992 SPC3_WB_ERROR_LOCATION_FMT_LBA = 0x01 993 } spc3_write_buffer_error_location_t; 994 995 /* 996 * SPC-4 7.5.1 Protocol values 997 */ 998 typedef enum spc4_protocol_id { 999 SPC4_PROTO_FIBRE_CHANNEL = 0, 1000 SPC4_PROTO_PARALLEL_SCSI = 1, 1001 SPC4_PROTO_SSA = 2, 1002 SPC4_PROTO_IEEE1394 = 3, 1003 SPC4_PROTO_RDMA = 4, 1004 SPC4_PROTO_ISCSI = 5, 1005 SPC4_PROTO_SAS = 6, 1006 SPC4_PROTO_ADT = 7, 1007 SPC4_PROTO_ATA = 8, 1008 SPC4_PROTO_NONE = 0xf 1009 } spc4_protocol_id_t; 1010 1011 /* 1012 * SPC-3 NAA identifier format (Table 305, 7.6.3.6.1) 1013 */ 1014 typedef struct spc3_naa_id_impl { 1015 DECL_BITFIELD2( 1016 snii_priv_msn :4, 1017 snii_naa :4); 1018 uint8_t snii_priv[1]; 1019 } spc3_naa_id_impl_t; 1020 1021 /* 1022 * SPC-3 NAA IEEE Extended Identifier field format (Table 307, 7.6.3.6.2) 1023 */ 1024 typedef struct spc3_naa_ieee_ext_id_impl { 1025 DECL_BITFIELD2( 1026 snieii_vendor_id_a_msn :4, 1027 snieii_naa :4); 1028 uint8_t snieii_vendor_id_a_lsb; 1029 uint8_t snieii_company_id[3]; 1030 uint8_t snieii_vendor_id_b[3]; 1031 } spc3_naa_ieee_ext_id_impl_t; 1032 1033 #define NAA_IEEE_EXT_VENDOR_A(idp) \ 1034 SCSI_MK12_4_8((idp)->snieii_vendor_id_a_msn, \ 1035 (idp)->snieii_vendor_id_a_lsb) 1036 #define NAA_IEEE_EXT_COMPANY_ID(idp) SCSI_READ24((idp)->snieii_company_id) 1037 #define NAA_IEEE_EXT_VENDOR_B(idp) SCSI_READ24((idp)->snieii_vendor_id_b) 1038 1039 /* 1040 * Ibid, Table 308 1041 */ 1042 typedef struct spc3_naa_ieee_reg_id_impl { 1043 DECL_BITFIELD2( 1044 snirii_company_id_msn :4, 1045 snirii_naa :4); 1046 uint16_t snirii_company_id_mid; 1047 DECL_BITFIELD2( 1048 snirii_vendor_id_msn :4, 1049 snirii_company_id_lsn :4); 1050 uint32_t snirii_vendor_id_low; 1051 } spc3_naa_ieee_reg_id_impl_t; 1052 1053 #define NAA_IEEE_REG_COMPANY_ID(idp) \ 1054 SCSI_MK24_4_16_4((idp)->snirii_company_id_msn, \ 1055 SCSI_READ16(&(idp)->snirii_company_id_mid), \ 1056 (idp)->snirii_company_id_lsn) 1057 #define NAA_IEEE_REG_VENDOR_ID(idp) \ 1058 SCSI_MK36_4_32((idp)->snirii_vendor_id_msn, \ 1059 SCSI_READ32(&(idp)->snirii_vendor_id_low)) 1060 1061 /* 1062 * Ibid, Table 309 1063 */ 1064 typedef struct spc3_naa_ieee_reg_ext_id_impl { 1065 DECL_BITFIELD2( 1066 snireii_company_id_msn :4, 1067 snireii_naa :4); 1068 uint16_t snireii_company_id_mid; 1069 DECL_BITFIELD2( 1070 snireii_vendor_id_msn :4, 1071 snireii_company_id_lsn :4); 1072 uint32_t snireii_vendor_id_low; 1073 uint64_t snireii_vendor_id_ext; 1074 } spc3_naa_ieee_reg_ext_id_impl_t; 1075 1076 #define NAA_IEEE_REG_EXT_COMPANY_ID(idp) \ 1077 SCSI_MK20_4_16_4((idp)->snireii_company_id_msn, \ 1078 SCSI_READ16(&(idp)->snireii_company_id_mid), \ 1079 (idp)->snireii_company_id_lsn) 1080 #define NAA_IEEE_REG_EXT_VENDOR_ID(idp) \ 1081 SCSI_MK36_4_32((idp)->snireii_vendor_id_msn, \ 1082 SCSI_READ32(&(idp)->snireii_vendor_id_low)) 1083 1084 typedef union spc3_naa_id_8_impl { 1085 struct { 1086 DECL_BITFIELD2( 1087 _reserved1 :4, 1088 sni8i_naa :4); 1089 } sni8i_hdr; 1090 spc3_naa_ieee_ext_id_impl_t sni8i_ext_id; 1091 spc3_naa_ieee_reg_id_impl_t sni8i_reg_id; 1092 } spc3_naa_id_8_impl_t; 1093 1094 #define sni8i_naa sni8i_hdr.sni8i_naa 1095 1096 typedef enum naa_id { 1097 NAA_IEEE_EXT = 0x2, 1098 NAA_LOCAL = 0x3, 1099 NAA_IEEE_REG = 0x5, 1100 NAA_IEEE_REG_EXT = 0x6 1101 } naa_id_t; 1102 1103 #pragma pack() 1104 1105 #ifdef __cplusplus 1106 } 1107 #endif 1108 1109 #endif /* _SPC3_TYPES_H */ 1110