Searched refs:processors (Results 1 – 10 of 10) sorted by relevance
163 * The pause instruction is a NOP on all other IA-32 processors.173 * prefetch is an SSE extension which is not supported on older 32-bit processors
521 List processors = getProcessors(donor); in solve() local523 "donor processors: " + processors); in solve()524 Iterator itProcessor = processors.iterator(); in solve()
430 ! Cheetah+, and Jaguar processors. Panther does support443 ! Registers on other source and target processors. The register448 ! empty if there are no non-local Panther processors on the
167 * The pause instruction is a NOP on all other IA-32 processors.
1765 / measuring the clock rate of very fast processors.1968 / measuring the clock rate of very fast processors.
837 …is not off-lined, as the memory controller on the CPU chip is still accessible by other processors"853 …is not off-lined, as the memory controller on the CPU chip is still accessible by other processors"869 …is not off-lined, as the memory controller on the CPU chip is still accessible by other processors"885 …is not off-lined, as the memory controller on the CPU chip is still accessible by other processors"
76 Process Management:::Manage current processes and processors:auths=solaris.smf.manage.cron,solaris.…
3622 processors online (if that can be3628 number of processors online (if
9855 Implemented support for the EM64T and other x86-64 processors. This 9856 essentially entails recognizing that these processors support non-aligned 9857 memory transfers. Previously, all 64-bit processors were assumed to lack 9869 on 64-bit processors instead of a fixed 32-bit word. (With assistance 15220 processors, memory, and interrupts during setup_arch(). Note that
15055 1101 TS-C43 card with 4 ADSP-TS101 processors18407 # Integrated in CX86111/CX86113 processors