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Searched refs:phy_data (Results 1 – 16 of 16) sorted by relevance

/titanic_41/usr/src/uts/common/io/e1000api/
H A De1000_phy.c1011 u16 phy_data; in e1000_set_master_slave_mode() local
1014 ret_val = hw->phy.ops.read_reg(hw, PHY_1000T_CTRL, &phy_data); in e1000_set_master_slave_mode()
1019 hw->phy.original_ms_type = (phy_data & CR_1000T_MS_ENABLE) ? in e1000_set_master_slave_mode()
1020 ((phy_data & CR_1000T_MS_VALUE) ? in e1000_set_master_slave_mode()
1026 phy_data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE); in e1000_set_master_slave_mode()
1029 phy_data |= CR_1000T_MS_ENABLE; in e1000_set_master_slave_mode()
1030 phy_data &= ~(CR_1000T_MS_VALUE); in e1000_set_master_slave_mode()
1033 phy_data &= ~CR_1000T_MS_ENABLE; in e1000_set_master_slave_mode()
1039 return hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data); in e1000_set_master_slave_mode()
1051 u16 phy_data; in e1000_copper_link_setup_82577() local
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H A De1000_80003es2lan.c665 u16 phy_data; in e1000_phy_force_speed_duplex_80003es2lan() local
676 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
680 phy_data &= ~GG82563_PSCR_CROSSOVER_MODE_AUTO; in e1000_phy_force_speed_duplex_80003es2lan()
681 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
685 DEBUGOUT1("GG82563 PSCR: %X\n", phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
687 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
691 e1000_phy_force_speed_duplex_setup(hw, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
694 phy_data |= MII_CR_RESET; in e1000_phy_force_speed_duplex_80003es2lan()
696 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
727 &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
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H A De1000_82540.c533 u16 phy_data; in e1000_set_vco_speed_82540() local
548 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data); in e1000_set_vco_speed_82540()
552 phy_data &= ~M88E1000_PHY_VCO_REG_BIT8; in e1000_set_vco_speed_82540()
553 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data); in e1000_set_vco_speed_82540()
563 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data); in e1000_set_vco_speed_82540()
567 phy_data |= M88E1000_PHY_VCO_REG_BIT11; in e1000_set_vco_speed_82540()
568 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data); in e1000_set_vco_speed_82540()
H A De1000_82541.c680 u16 phy_data, phy_saved_data, speed, duplex, i; in e1000_config_dsp_after_link_change_82541() local
712 &phy_data); in e1000_config_dsp_after_link_change_82541()
716 phy_data &= ~IGP01E1000_PHY_EDAC_MU_INDEX; in e1000_config_dsp_after_link_change_82541()
720 phy_data); in e1000_config_dsp_after_link_change_82541()
734 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data); in e1000_config_dsp_after_link_change_82541()
742 &phy_data); in e1000_config_dsp_after_link_change_82541()
746 idle_errs += (phy_data & SR_1000T_IDLE_ERROR_CNT); in e1000_config_dsp_after_link_change_82541()
789 &phy_data); in e1000_config_dsp_after_link_change_82541()
793 phy_data &= ~IGP01E1000_PHY_EDAC_MU_INDEX; in e1000_config_dsp_after_link_change_82541()
794 phy_data |= IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS; in e1000_config_dsp_after_link_change_82541()
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H A De1000_ich8lan.c2034 u16 phy_data; in e1000_write_smbus_addr() local
2042 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_SMB_ADDR, &phy_data); in e1000_write_smbus_addr()
2046 phy_data &= ~HV_SMB_ADDR_MASK; in e1000_write_smbus_addr()
2047 phy_data |= (strap >> E1000_STRAP_SMBUS_ADDRESS_SHIFT); in e1000_write_smbus_addr()
2048 phy_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID; in e1000_write_smbus_addr()
2053 phy_data &= ~HV_SMB_ADDR_FREQ_MASK; in e1000_write_smbus_addr()
2054 phy_data |= (freq & (1 << 0)) << in e1000_write_smbus_addr()
2056 phy_data |= (freq & (1 << 1)) << in e1000_write_smbus_addr()
2063 return e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, phy_data); in e1000_write_smbus_addr()
2425 u16 phy_data; in e1000_hv_phy_workarounds_ich8lan() local
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H A De1000_82575.c2949 u16 phy_data; in e1000_set_eee_i354() local
2965 &phy_data); in e1000_set_eee_i354()
2969 phy_data |= E1000_M88E1543_EEE_CTRL_1_MS; in e1000_set_eee_i354()
2971 phy_data); in e1000_set_eee_i354()
2983 &phy_data); in e1000_set_eee_i354()
2987 phy_data |= E1000_EEE_ADV_100_SUPPORTED | in e1000_set_eee_i354()
2991 phy_data); in e1000_set_eee_i354()
2996 &phy_data); in e1000_set_eee_i354()
3000 phy_data &= ~(E1000_EEE_ADV_100_SUPPORTED | in e1000_set_eee_i354()
3004 phy_data); in e1000_set_eee_i354()
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H A De1000_82543.c1412 u16 phy_data; in e1000_config_mac_to_phy_82543() local
1428 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); in e1000_config_mac_to_phy_82543()
1433 if (phy_data & M88E1000_PSSR_DPLX) in e1000_config_mac_to_phy_82543()
1442 if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) in e1000_config_mac_to_phy_82543()
1444 else if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_100MBS) in e1000_config_mac_to_phy_82543()
/titanic_41/usr/src/grub/grub-0.97/netboot/
H A De1000.c110 static int e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data);
111 static int e1000_read_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data);
112 static int e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data);
113 static int e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, uint16_t phy_data);
1546 uint16_t phy_data; local
1601 &phy_data)))
1607 phy_data &= ~(IGP01E1000_PSCR_AUTO_MDIX |
1613 phy_data &= ~IGP01E1000_PSCR_AUTO_MDIX;
1617 phy_data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;
1620 phy_data |= IGP01E1000_PSCR_FORCE_MDI_MDIX;
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H A Ddavicom.c211 u16 phy_data; in phy_read() local
242 for (phy_data=0, i=0; i<16; i++) { in phy_read()
243 phy_data<<=1; in phy_read()
244 phy_data|=phy_read_1bit(io_dcr9); in phy_read()
247 return phy_data; in phy_read()
253 static void phy_write(int location, u16 phy_data) in phy_write() argument
288 phy_write_1bit(io_dcr9, phy_data&i ? PHY_DATA_1: PHY_DATA_0); in phy_write()
294 static void phy_write_1bit(u32 ee_addr, u32 phy_data) in phy_write_1bit() argument
297 outl(phy_data, ee_addr); /* MII Clock Low */ in phy_write_1bit()
299 outl(phy_data|MDCLKH, ee_addr); /* MII Clock High */ in phy_write_1bit()
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/titanic_41/usr/src/uts/common/io/e1000g/
H A De1000g_rx.c155 uint16_t phy_data; in e1000g_rx_setup() local
333 (void) e1000_read_phy_reg(hw, PHY_REG(770, 26), &phy_data); in e1000g_rx_setup()
334 phy_data &= 0xfff8; in e1000g_rx_setup()
335 phy_data |= (1 << 2); in e1000g_rx_setup()
336 (void) e1000_write_phy_reg(hw, PHY_REG(770, 26), phy_data); in e1000g_rx_setup()
339 (void) e1000_read_phy_reg(hw, 22, &phy_data); in e1000g_rx_setup()
340 phy_data &= 0x0fff; in e1000g_rx_setup()
341 phy_data |= (1 << 14); in e1000g_rx_setup()
344 (void) e1000_write_phy_reg(hw, 22, phy_data); in e1000g_rx_setup()
H A De1000g_workarounds.c188 u16 phy_data = 0; in e1000_igp_ttl_workaround_82547() local
226 &phy_data); in e1000_igp_ttl_workaround_82547()
233 if (phy_data & NWAY_ER_PAR_DETECT_FAULT) { in e1000_igp_ttl_workaround_82547()
/titanic_41/usr/src/uts/common/io/ixgbe/
H A Dixgbe_phy.c279 u32 device_type, u16 *phy_data) in ixgbe_read_phy_reg_generic() argument
361 *phy_data = (u16)(data); in ixgbe_read_phy_reg_generic()
379 u32 device_type, u16 phy_data) in ixgbe_write_phy_reg_generic() argument
398 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_generic()
652 u16 phy_data = 0; in ixgbe_check_phy_link_tnx() local
670 &phy_data); in ixgbe_check_phy_link_tnx()
671 phy_link = phy_data & IXGBE_MDIO_VENDOR_SPECIFIC_1_LINK_STATUS; in ixgbe_check_phy_link_tnx()
672 phy_speed = phy_data & in ixgbe_check_phy_link_tnx()
830 u16 phy_data = 0; in ixgbe_reset_phy_nl() local
837 IXGBE_MDIO_PHY_XS_DEV_TYPE, &phy_data); in ixgbe_reset_phy_nl()
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H A Dixgbe_phy.h105 u32 device_type, u16 *phy_data);
107 u32 device_type, u16 phy_data);
H A Dixgbe_api.c451 u16 *phy_data) in ixgbe_read_phy_reg() argument
462 (hw, reg_addr, device_type, phy_data), in ixgbe_read_phy_reg()
477 u16 phy_data) in ixgbe_write_phy_reg() argument
488 (hw, reg_addr, device_type, phy_data), in ixgbe_write_phy_reg()
H A Dixgbe_api.h65 u16 *phy_data);
67 u16 phy_data);
/titanic_41/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c2882 uint16_t phy_data = 0; in nxge_nlp2020_i2c_read() local
2892 phy_data = ((address + 1) << NLP2020_XCVR_I2C_ADDR_SH) | reg; in nxge_nlp2020_i2c_read()
2894 phy_dev, phy_reg, phy_data) != NXGE_OK) in nxge_nlp2020_i2c_read()
2906 &phy_data); in nxge_nlp2020_i2c_read()
2907 *data = (phy_data >> 8); in nxge_nlp2020_i2c_read()